From patchwork Wed Nov 2 21:57:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 9409955 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E57FC60721 for ; Wed, 2 Nov 2016 21:57:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D66082A500 for ; Wed, 2 Nov 2016 21:57:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C9C762A5DF; Wed, 2 Nov 2016 21:57:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.4 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 452ED2A500 for ; Wed, 2 Nov 2016 21:57:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756290AbcKBV5Q (ORCPT ); Wed, 2 Nov 2016 17:57:16 -0400 Received: from mail-lf0-f42.google.com ([209.85.215.42]:33480 "EHLO mail-lf0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755930AbcKBV5P (ORCPT ); Wed, 2 Nov 2016 17:57:15 -0400 Received: by mail-lf0-f42.google.com with SMTP id c13so23901919lfg.0 for ; Wed, 02 Nov 2016 14:57:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:organization:user-agent :in-reply-to:references:mime-version:content-transfer-encoding; bh=tFhXCSuUfLsI4liTYsZMfruXK9rpK8OeNweVTmCw0OU=; b=P88xCyWFDkZffUacv4A9jVX/PJ7eXJgaOFQLfPY+lTpHMd8WWe4DoSQJnm2pz+NPCQ FZMdnTv4bB85Nju419y8eQ/BbvOslrCUzJtXgW4Itqe1c/H4W7ih64pluKAmRZ+Wm66/ o13KRP+M1hSbFsZktqX2f5kAnGCHPL17e5jCr5ceBGemQC67jigYxbBpn+ilHJvHxLkF cJiuck8jn0gYpVcXjTYatJpluJsu034Vmu+EH8YwX8w426zFI3bPgn46QvnP2kJDTHRR 6pnZ3b0ekcS9JQ/h162sLgD+LVzfLAceYDkV9y1WnOG47gvqURY9ODA7kcELfKPF1WXV esDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding; bh=tFhXCSuUfLsI4liTYsZMfruXK9rpK8OeNweVTmCw0OU=; b=elRmZ5AkbZFeb+fckB7SUgaW5ULcIkHq2RhwyR6gM88n2nulCmp8KQ8hQbcIdUNSpR ivcVVG95mqIi6B01sno60BFwHk30cw0VWERW4fmP51Y+J+WrpVLzaqmKCXcbvRTQpkvJ xO75D0enDTCaLelAzSA1M8pT4abtT36K6evauK9AmH6/fwi7HowtnNXX9aapuXBXQfdc xSMYwooFEOpUVHfcHjGYDZ8xtKb2KYGEULuQX78MXwmBdc5XHvZ1IBOVqqck1pQM7C3C cLd+4ryuWC4GUuQtDItg9nz/WG+gUlEE0arGNa+kRWxUKjzE0p4OSkKSMgUI2SFL1ees +c4w== X-Gm-Message-State: ABUngvcxuyqQ/6m6Ht6peRjx4OvNO6F5V2nUtxDC4D2WJGHQ0dusdPUBCSK+LnIXjdpPmQ== X-Received: by 10.25.8.6 with SMTP id 6mr3062419lfi.64.1478123833818; Wed, 02 Nov 2016 14:57:13 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.85.159]) by smtp.gmail.com with ESMTPSA id 76sm818594ljb.43.2016.11.02.14.57.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Nov 2016 14:57:13 -0700 (PDT) From: Sergei Shtylyov To: robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org, sboyd@codeaurora.org, linux-renesas-soc@vger.kernel.org, horms+renesas@verge.net.au Subject: [PATCH v5 1/2] ARM: shmobile: r8a7743: add CPG clock index macros Date: Thu, 03 Nov 2016 00:57:11 +0300 Message-ID: <2213928.GM4AGq02MQ@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.10 (Linux/4.7.9-100.fc23.x86_64; KDE/4.14.20; x86_64; ; ) In-Reply-To: <1737840.BeMyoUTlpl@wasted.cogentembedded.com> References: <1737840.BeMyoUTlpl@wasted.cogentembedded.com> MIME-Version: 1.0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add macros usable by the device tree sources to reference the R8A7743 CPG clocks by index. The data comes from the table 7.2b in the revision 0.50 of the RZ/G Series User's Manual. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven --- Changes in version 4: - added Geert's tag. Changes in version 3: - renumbered the #define's in order to match the R8A7791 CPG clocks; - added the reference to the manual in the patch description. Changes in version 2: - reduced the macro value indentation. include/dt-bindings/clock/r8a7743-cpg-mssr.h | 43 +++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) Index: linux/include/dt-bindings/clock/r8a7743-cpg-mssr.h =================================================================== --- /dev/null +++ linux/include/dt-bindings/clock/r8a7743-cpg-mssr.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2016 Cogent Embedded Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ + +#include + +/* r8a7743 CPG Core Clocks */ +#define R8A7743_CLK_Z 0 +#define R8A7743_CLK_ZG 1 +#define R8A7743_CLK_ZTR 2 +#define R8A7743_CLK_ZTRD2 3 +#define R8A7743_CLK_ZT 4 +#define R8A7743_CLK_ZX 5 +#define R8A7743_CLK_ZS 6 +#define R8A7743_CLK_HP 7 +#define R8A7743_CLK_B 9 +#define R8A7743_CLK_LB 10 +#define R8A7743_CLK_P 11 +#define R8A7743_CLK_CL 12 +#define R8A7743_CLK_M2 13 +#define R8A7743_CLK_ZB3 15 +#define R8A7743_CLK_ZB3D2 16 +#define R8A7743_CLK_DDR 17 +#define R8A7743_CLK_SDH 18 +#define R8A7743_CLK_SD0 19 +#define R8A7743_CLK_SD2 20 +#define R8A7743_CLK_SD3 21 +#define R8A7743_CLK_MMC0 22 +#define R8A7743_CLK_MP 23 +#define R8A7743_CLK_QSPI 26 +#define R8A7743_CLK_CP 27 +#define R8A7743_CLK_RCAN 28 +#define R8A7743_CLK_R 29 +#define R8A7743_CLK_OSC 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A7743_CPG_MSSR_H__ */