diff mbox

pinctrl: sh-pfc: r8a7794: fix GP2[29] muxing

Message ID 2253759.3Cn6OZRLxj@wasted.cogentembedded.com (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show

Commit Message

Sergei Shtylyov Feb. 25, 2016, 7:58 p.m. UTC 
From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>

GP2[29] muxing is controlled by 2-bit IP6[3:2] field, yet only 3 values
are listed  instead of 4...

[Sergei: fixed up the formatting, renamed, added the changelog.]

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
The patch is against the 'fixes' branch of Linus W.'s 'linux-pinctrl.git' repo.

 drivers/pinctrl/sh-pfc/pfc-r8a7794.c |    1 +
 1 file changed, 1 insertion(+)

Comments

Geert Uytterhoeven Feb. 26, 2016, 12:29 p.m. UTC | #1 
On Thu, Feb 25, 2016 at 8:58 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
>
> GP2[29] muxing is controlled by 2-bit IP6[3:2] field, yet only 3 values
> are listed  instead of 4...
>
> [Sergei: fixed up the formatting, renamed, added the changelog.]
>
> Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Thanks, nice catch!

I guess I have found a reason to queue up more stuff on sh-pfc-for-v4.6.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox

Patch

Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
===================================================================
--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
@@ -3974,6 +3974,7 @@  static const struct pinmux_cfg_reg pinmu
 		FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, 0,
 		/* IP6_3_2 [2] */
 		FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29,
+		0,
 		/* IP6_1_0 [2] */
 		FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28, 0, }
 	},