From patchwork Tue May 31 22:09:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 9145729 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id ECE6960761 for ; Tue, 31 May 2016 22:10:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DE19B2657C for ; Tue, 31 May 2016 22:10:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CF05F1FF45; Tue, 31 May 2016 22:10:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 78D071FF45 for ; Tue, 31 May 2016 22:10:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752788AbcEaWKE (ORCPT ); Tue, 31 May 2016 18:10:04 -0400 Received: from mail-lf0-f42.google.com ([209.85.215.42]:33494 "EHLO mail-lf0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751364AbcEaWKD (ORCPT ); Tue, 31 May 2016 18:10:03 -0400 Received: by mail-lf0-f42.google.com with SMTP id s64so814763lfe.0 for ; Tue, 31 May 2016 15:10:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:to:subject:date:message-id:organization:user-agent:in-reply-to :references:mime-version:content-transfer-encoding; bh=hNfyxqVdjw0bnAKPDwqOW8cnYX/qKJ4z8WeJWlfVFRI=; b=TknAf1DO8sg2YS54XJ6ahXqmUytovmec9uWC9dnlMVWxlteilAZZFgOko7ZkxiP2XQ BUTM49b3eO7ttJEzDIEA1yJZPB59da9evK5/YbCKPIdF9HJXWe9E9vD85TnWevVGBGxW /+r8D8ox4IF1x/hk3lp3f9uPc/s+cFnCUQS9phf4YWxEcwNPpo5f9LU3I08hto5sZsSq nkyceRti24WC8QigXOHO8u0pPTYixSGRU/MZ+oc9k4hPQUfL9s2+ZbYCf7lqpgd3u6Hd LREMtPcJpFZjG9fCTgwYeToeKO2wH0JgjdyULbG3w1W498g3IXk3PTqpFUU++jUTZAE4 t3/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding; bh=hNfyxqVdjw0bnAKPDwqOW8cnYX/qKJ4z8WeJWlfVFRI=; b=CJB/TD0/btE0M42V8chkO9AyMhj3dK7oBKE9OCA9Qei9H378W8knfvY0JhMvoXPzde sBPc//GkikcG05klZzQgVtxLgIXkzP6EvvgO54/uLT78GLEBw6rkMtgsK1qXRPZ6rrj6 Ai2QoEqeZL74pfmGSo0QnI/BSMGkuM1RjXO/iUOkGVVFora9tU4Jm846SX2rvoiWpuJG SPjr4kwY9nr0gul++7oSWzWdKTByU2XAo0R0kuOejV2QUHzH2lvACdrUoLx5ykv0z99e 2xbQ5Fqc7RbPeHh4fFVEIfuP1c7jdN8p6vbBP+3T6JcLelactefsrE+uhtzDZcOFui4G 6ypA== X-Gm-Message-State: ALyK8tKVpG0xa8OiBAriCFi95eNuoOyhjv8dvMvfy+tDsNs+QfQTnMqpvtM/lHb4xaiNzg== X-Received: by 10.25.82.17 with SMTP id g17mr376118lfb.6.1464732600824; Tue, 31 May 2016 15:10:00 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.80.163]) by smtp.gmail.com with ESMTPSA id c1sm5353303lfc.34.2016.05.31.15.09.59 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 31 May 2016 15:10:00 -0700 (PDT) From: Sergei Shtylyov To: linux-renesas-soc@vger.kernel.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org Subject: [PATCH 01/13] ARM: shmobile: r8a7792: add clock index macros Date: Wed, 01 Jun 2016 01:09:58 +0300 Message-ID: <2280165.siMXMbFrFe@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.10 (Linux/4.4.10-200.fc22.x86_64; KDE/4.14.17; x86_64; ; ) In-Reply-To: <13205049.n7pM8utpHF@wasted.cogentembedded.com> References: <13205049.n7pM8utpHF@wasted.cogentembedded.com> MIME-Version: 1.0 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add macros usable by the device tree sources to reference the R8A7792 clocks by index. Signed-off-by: Sergei Shtylyov --- include/dt-bindings/clock/r8a7792-clock.h | 104 ++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) Index: renesas/include/dt-bindings/clock/r8a7792-clock.h =================================================================== --- /dev/null +++ renesas/include/dt-bindings/clock/r8a7792-clock.h @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DT_BINDINGS_CLOCK_R8A7792_H__ +#define __DT_BINDINGS_CLOCK_R8A7792_H__ + +/* CPG */ +#define R8A7792_CLK_MAIN 0 +#define R8A7792_CLK_PLL0 1 +#define R8A7792_CLK_PLL1 2 +#define R8A7792_CLK_PLL3 3 +#define R8A7792_CLK_LB 4 +#define R8A7792_CLK_QSPI 5 +#define R8A7792_CLK_SDH 6 +#define R8A7792_CLK_SD0 7 +#define R8A7792_CLK_SD1 8 +#define R8A7792_CLK_Z 9 + +/* MSTP0 */ +#define R8A7792_CLK_MSIOF0 0 + +/* MSTP1 */ +#define R8A7792_CLK_TMU1 11 +#define R8A7792_CLK_TMU3 21 +#define R8A7792_CLK_TMU2 22 +#define R8A7792_CLK_CMT0 24 +#define R8A7792_CLK_TMU0 25 +#define R8A7792_CLK_VSP1DU1 27 +#define R8A7792_CLK_VSP1DU0 28 +#define R8A7792_CLK_VSP1_SY 31 + +/* MSTP2 */ +#define R8A7792_CLK_MSIOF1 8 +#define R8A7792_CLK_SYS_DMAC0 18 +#define R8A7792_CLK_SYS_DMAC1 19 + +/* MSTP3 */ +#define R8A7792_CLK_TPU0 4 +#define R8A7792_CLK_SDHI0 14 +#define R8A7792_CLK_CMT1 29 + +/* MSTP4 */ +#define R8A7792_CLK_IRQC 7 + +/* MSTP5 */ +#define R8A7792_CLK_AUDIO_DMAC0 2 +#define R8A7792_CLK_THERMAL 22 +#define R8A7792_CLK_PWM 23 + +/* MSTP7 */ +#define R8A7792_CLK_HSCIF1 16 +#define R8A7792_CLK_HSCIF0 17 +#define R8A7792_CLK_SCIF3 18 +#define R8A7792_CLK_SCIF2 19 +#define R8A7792_CLK_SCIF1 20 +#define R8A7792_CLK_SCIF0 21 +#define R8A7792_CLK_DU1 23 +#define R8A7792_CLK_DU0 24 + +/* MSTP8 */ +#define R8A7792_CLK_VIN5 4 +#define R8A7792_CLK_VIN4 5 +#define R8A7792_CLK_VIN3 8 +#define R8A7792_CLK_VIN2 9 +#define R8A7792_CLK_VIN1 10 +#define R8A7792_CLK_VIN0 11 +#define R8A7792_CLK_ETHERAVB 12 + +/* MSTP9 */ +#define R8A7792_CLK_GPIO7 4 +#define R8A7792_CLK_GPIO6 5 +#define R8A7792_CLK_GPIO5 7 +#define R8A7792_CLK_GPIO4 8 +#define R8A7792_CLK_GPIO3 9 +#define R8A7792_CLK_GPIO2 10 +#define R8A7792_CLK_GPIO1 11 +#define R8A7792_CLK_GPIO0 12 +#define R8A7792_CLK_GPIO11 13 +#define R8A7792_CLK_GPIO10 14 +#define R8A7792_CLK_CAN1 15 +#define R8A7792_CLK_CAN0 16 +#define R8A7792_CLK_QSPI_MOD 17 +#define R8A7792_CLK_GPIO9 19 +#define R8A7792_CLK_GPIO8 21 +#define R8A7792_CLK_I2C5 25 +#define R8A7792_CLK_IICDVFS 26 +#define R8A7792_CLK_I2C4 27 +#define R8A7792_CLK_I2C3 28 +#define R8A7792_CLK_I2C2 29 +#define R8A7792_CLK_I2C1 30 +#define R8A7792_CLK_I2C0 31 + +/* MSTP10 */ +#define R8A7792_CLK_SSI_ALL 5 +#define R8A7792_CLK_SSI4 11 +#define R8A7792_CLK_SSI3 12 + +#endif /* __DT_BINDINGS_CLOCK_R8A7792_H__ */