diff mbox series

[PATCH/RFC] pinctrl: renesas: r8a779g0: Add INTC-EX pins, groups, and function

Message ID 28fe05d41bea5a03ea6c8434f5a4fb6c80b48867.1664368425.git.geert+renesas@glider.be (mailing list archive)
State RFC
Delegated to: Geert Uytterhoeven
Headers show
Series [PATCH/RFC] pinctrl: renesas: r8a779g0: Add INTC-EX pins, groups, and function | expand

Commit Message

Geert Uytterhoeven Sept. 28, 2022, 12:35 p.m. UTC
Add pins, groups, and function for the Interrupt Controller for External
Devices (INTC-EX) on the Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
The naming of alternate pins is inconsistent, but it does match the
current documentation (R-Car V4H rev. 0.51), e.g.:
  - IRQ0 and IRQ0_A,
  - IRQ3 and IRQ3_B,
  - IRQ4_A and IRQ4_B.
Perhaps this has been improved in a later revision?
---
 drivers/pinctrl/renesas/pfc-r8a779g0.c | 113 +++++++++++++++++++++++++
 1 file changed, 113 insertions(+)
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index 5dd1c2c7708a802b..24ea8e7f95eac915 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -1712,6 +1712,90 @@  static const unsigned int i2c5_mux[] = {
 	SDA5_MARK, SCL5_MARK,
 };
 
+/* - INTC-EX ---------------------------------------------------------------- */
+static const unsigned int intc_ex_irq0_pins[] = {
+	/* IRQ0 */
+	RCAR_GP_PIN(0, 6),
+};
+static const unsigned int intc_ex_irq0_mux[] = {
+	IRQ0_MARK,
+};
+static const unsigned int intc_ex_irq0_a_pins[] = {
+	/* IRQ0 */
+	RCAR_GP_PIN(1, 20),
+};
+static const unsigned int intc_ex_irq0_a_mux[] = {
+	IRQ0_A_MARK,
+};
+
+static const unsigned int intc_ex_irq1_pins[] = {
+	/* IRQ1 */
+	RCAR_GP_PIN(0, 5),
+};
+static const unsigned int intc_ex_irq1_mux[] = {
+	IRQ1_MARK,
+};
+static const unsigned int intc_ex_irq1_a_pins[] = {
+	/* IRQ1_A */
+	RCAR_GP_PIN(1, 21),
+};
+static const unsigned int intc_ex_irq1_a_mux[] = {
+	IRQ1_A_MARK,
+};
+
+static const unsigned int intc_ex_irq2_pins[] = {
+	/* IRQ2 */
+	RCAR_GP_PIN(0, 4),
+};
+static const unsigned int intc_ex_irq2_mux[] = {
+	IRQ2_MARK,
+};
+static const unsigned int intc_ex_irq2_a_pins[] = {
+	/* IRQ2_A */
+	RCAR_GP_PIN(0, 13),
+};
+static const unsigned int intc_ex_irq2_a_mux[] = {
+	IRQ2_A_MARK,
+};
+
+static const unsigned int intc_ex_irq3_pins[] = {
+	/* IRQ3 */
+	RCAR_GP_PIN(0, 3),
+};
+static const unsigned int intc_ex_irq3_mux[] = {
+	IRQ3_MARK,
+};
+static const unsigned int intc_ex_irq3_b_pins[] = {
+	/* IRQ3_B */
+	RCAR_GP_PIN(1, 23),
+};
+static const unsigned int intc_ex_irq3_b_mux[] = {
+	IRQ3_B_MARK,
+};
+
+static const unsigned int intc_ex_irq4_a_pins[] = {
+	/* IRQ4_A */
+	RCAR_GP_PIN(1, 17),
+};
+static const unsigned int intc_ex_irq4_a_mux[] = {
+	IRQ4_A_MARK,
+};
+static const unsigned int intc_ex_irq4_b_pins[] = {
+	/* IRQ4_B */
+	RCAR_GP_PIN(2, 3),
+};
+static const unsigned int intc_ex_irq4_b_mux[] = {
+	IRQ4_B_MARK,
+};
+
+static const unsigned int intc_ex_irq5_pins[] = {
+	/* IRQ5 */
+	RCAR_GP_PIN(2, 2),
+};
+static const unsigned int intc_ex_irq5_mux[] = {
+	IRQ5_MARK,
+};
+
 /* - MMC -------------------------------------------------------------------- */
 static const unsigned int mmc_data_pins[] = {
 	/* MMC_SD_D[0:3], MMC_D[4:7] */
@@ -2528,6 +2612,18 @@  static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(i2c4),
 	SH_PFC_PIN_GROUP(i2c5),
 
+	SH_PFC_PIN_GROUP(intc_ex_irq0),		/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq0_a),	/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq1),		/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq1_a),	/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq2),		/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq2_a),	/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq3),		/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq3_b),	/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq4_a),	/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq4_b),	/* suffix might be updated */
+	SH_PFC_PIN_GROUP(intc_ex_irq5),
+
 	BUS_DATA_PIN_GROUP(mmc_data, 1),
 	BUS_DATA_PIN_GROUP(mmc_data, 4),
 	BUS_DATA_PIN_GROUP(mmc_data, 8),
@@ -2770,6 +2866,21 @@  static const char * const i2c5_groups[] = {
 	"i2c5",
 };
 
+static const char * const intc_ex_groups[] = {
+	/* suffix might be updated */
+	"intc_ex_irq0",
+	"intc_ex_irq0_a",
+	"intc_ex_irq1",
+	"intc_ex_irq1_a",
+	"intc_ex_irq2",
+	"intc_ex_irq2_a",
+	"intc_ex_irq3",
+	"intc_ex_irq3_b",
+	"intc_ex_irq4_a",
+	"intc_ex_irq4_b",
+	"intc_ex_irq5",
+};
+
 static const char * const mmc_groups[] = {
 	"mmc_data1",
 	"mmc_data4",
@@ -2983,6 +3094,8 @@  static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(i2c4),
 	SH_PFC_FUNCTION(i2c5),
 
+	SH_PFC_FUNCTION(intc_ex),
+
 	SH_PFC_FUNCTION(mmc),
 
 	SH_PFC_FUNCTION(msiof0),