From patchwork Mon Apr 4 01:22:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8735691 Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D1F49C0554 for ; Mon, 4 Apr 2016 01:22:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3D350200CF for ; Mon, 4 Apr 2016 01:22:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7EC49201B4 for ; Mon, 4 Apr 2016 01:22:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751578AbcDDBW4 (ORCPT ); Sun, 3 Apr 2016 21:22:56 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:53503 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752336AbcDDBW4 (ORCPT ); Sun, 3 Apr 2016 21:22:56 -0400 Received: from reginn.isobedori.kobe.vergenet.net (p8241-ipbfp1002kobeminato.hyogo.ocn.ne.jp [118.10.140.241]) by kirsty.vergenet.net (Postfix) with ESMTPA id EDC0625BE94; Mon, 4 Apr 2016 11:22:36 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1459732957; bh=9YUVZjzlDXA3IWV/mT63oy2rJfIi5kYtsjxKHU612Po=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ojgGINHmsv5F1GA2rBQqq+y0cnQalKQHSfbv0HNrsiYlt63fwuG8qG6PqOoL3iDg8 YsTyCcJlu/8GdY3Rl+9nYJO7vOsVREz165bXriSWDwBu3cywYN/1kNTW/sFjW5EVsr d8wowKHQwHgk1xs7GP11fJZvM0FHbOM116ddV/k4= Received: by reginn.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id DD699942CBE; Mon, 4 Apr 2016 10:22:37 +0900 (JST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Simon Horman Subject: [PATCH 17/26] ARM: dts: r8a7779: Remove unnecessary clock-output-names properties Date: Mon, 4 Apr 2016 10:22:25 +0900 Message-Id: <3f6dba702c57908c5f66601ced6ef9f131759611.1459731908.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP * Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7779.dtsi | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index a0cc08e6295b..60bc1e66bba9 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -445,12 +445,11 @@ ranges; /* External root clock */ - extal_clk: extal_clk { + extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>; /* This value must be overriden by the board. */ clock-frequency = <0>; - clock-output-names = "extal"; }; /* External SCIF clock */ @@ -474,37 +473,33 @@ }; /* Fixed factor clocks */ - i_clk: i_clk { + i_clk: i { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7779_CLK_PLLA>; #clock-cells = <0>; clock-div = <2>; clock-mult = <1>; - clock-output-names = "i"; }; - s3_clk: s3_clk { + s3_clk: s3 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7779_CLK_PLLA>; #clock-cells = <0>; clock-div = <8>; clock-mult = <1>; - clock-output-names = "s3"; }; - s4_clk: s4_clk { + s4_clk: s4 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7779_CLK_PLLA>; #clock-cells = <0>; clock-div = <16>; clock-mult = <1>; - clock-output-names = "s4"; }; - g_clk: g_clk { + g_clk: g { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A7779_CLK_PLLA>; #clock-cells = <0>; clock-div = <24>; clock-mult = <1>; - clock-output-names = "g"; }; /* Gate clocks */