diff mbox series

[14/26] arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1

Message ID 4162aa9db3d44691c6ca67eacfe0099723684506.1554281697.git.horms+renesas@verge.net.au (mailing list archive)
State Accepted
Commit 4162aa9db3d44691c6ca67eacfe0099723684506
Delegated to: Simon Horman
Headers show
Series [GIT,PULL] Renesas ARM64 Based SoC DT Updates for v5.2 | expand

Commit Message

Simon Horman April 3, 2019, 10:53 a.m. UTC 
From: Marek Vasut <marek.vasut+renesas@gmail.com>

Enable both CAN0 and CAN1 controllers on R8A77995 Draak board,
since they are available on connectors CN43, CN44 respectively.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 244b0dda03ed..babca7cf23b9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -179,6 +179,18 @@ 
 	};
 };
 
+&can0 {
+	pinctrl-0 = <&can0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&can1 {
+	pinctrl-0 = <&can1_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
 &du {
 	pinctrl-0 = <&du_pins>;
 	pinctrl-names = "default";
@@ -382,6 +394,16 @@ 
 		};
 	};
 
+	can0_pins: can0 {
+		groups = "can0_data_a";
+		function = "can0";
+	};
+
+	can1_pins: can1 {
+		groups = "can1_data_a";
+		function = "can1";
+	};
+
 	du_pins: du {
 		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
 		function = "du";