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[18/26] arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config

Message ID 474706117c2baa68bf053f16cd35618d30bf4c06.1554281697.git.horms+renesas@verge.net.au (mailing list archive)
State Accepted
Commit 474706117c2baa68bf053f16cd35618d30bf4c06
Delegated to: Simon Horman
Headers show
Series [GIT,PULL] Renesas ARM64 Based SoC DT Updates for v5.2 | expand

Commit Message

Simon Horman April 3, 2019, 10:54 a.m. UTC 
On Ebisu the DDR0 power rail needs to be kept powered when backup mode is
enabled.  Reflect this in the "rohm,ddr-backup-power" property for the
BD9571MWV PMIC node.

The accessory power switch (SW23) is a toggle switch, hence specify
"rohm,rstbmode-level".

Based on advice from Geert Uytterhoeven.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index 18a99d2e1ea5..0e873ccfd9e5 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -466,6 +466,8 @@ 
 		#interrupt-cells = <2>;
 		gpio-controller;
 		#gpio-cells = <2>;
+		rohm,ddr-backup-power = <0x1>;
+		rohm,rstbmode-level;
 	};
 };