From patchwork Mon Aug 15 08:55:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 9280495 X-Patchwork-Delegate: horms@verge.net.au Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6293060780 for ; Mon, 15 Aug 2016 08:56:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 50AE328BE5 for ; Mon, 15 Aug 2016 08:56:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4540828BE8; Mon, 15 Aug 2016 08:56:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DDBD328BE5 for ; Mon, 15 Aug 2016 08:56:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752936AbcHOI4Y (ORCPT ); Mon, 15 Aug 2016 04:56:24 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:47991 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752925AbcHOI4X (ORCPT ); Mon, 15 Aug 2016 04:56:23 -0400 Received: from penelope.kanocho.kobe.vergenet.net (unknown [217.111.208.18]) by kirsty.vergenet.net (Postfix) with ESMTPSA id 5D21A25B7FE; Mon, 15 Aug 2016 18:56:03 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1471251363; bh=D8nD1BoTVdNI3jQ9UTC0bCV4wQ7iIjWXzsK9SktRwLM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Eiw72ksxR8aXRHWf35Jt+4djarFYrjkjawVLmwlJg/ZHxIWl+dLr75yWr/Xv8W45J 7vMSoxGh8TINRXqhpo7d8lsgisoklMfKMhOumUH7PpuHRqVYmD9MC6cxGBiYX3yQGd yEARByNwraHBit1aoNIHSmxOd43d5A42sFrr2ZVA= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id 5FB21620EB; Mon, 15 Aug 2016 10:55:55 +0200 (CEST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Sergei Shtylyov , Simon Horman Subject: [PATCH 08/26] ARM: dts: r8a7792: add CAN clocks Date: Mon, 15 Aug 2016 10:55:27 +0200 Message-Id: <47db051c22a03d41eac0d8193f3fe37b4f9768e9.1471251169.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.7.0.rc3.207.g0ac5344 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sergei Shtylyov The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and the external clock fed on the CAN_CLK pin. Describe those clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7792.dtsi | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index 37c9d95688cf..af8020bfc030 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -511,6 +511,13 @@ clock-div = <8>; clock-mult = <1>; }; + rcan_clk: rcan { + compatible = "fixed-factor-clock"; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-div = <49>; + clock-mult = <1>; + }; /* Gate clocks */ mstp1_clks: mstp1_clks@e6150134 { @@ -572,7 +579,8 @@ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, - <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>; + <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>, + <&cp_clk>, <&cp_clk>; #clock-cells = <1>; clock-indices = < R8A7792_CLK_GPIO7 R8A7792_CLK_GPIO6 @@ -580,12 +588,14 @@ R8A7792_CLK_GPIO3 R8A7792_CLK_GPIO2 R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0 R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10 + R8A7792_CLK_CAN1 R8A7792_CLK_CAN0 R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8 >; clock-output-names = "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", - "gpio11", "gpio10", "gpio9", "gpio8"; + "gpio11", "gpio10", "can1", "can0", + "gpio9", "gpio8"; }; }; @@ -604,4 +614,12 @@ /* This value must be overridden by the board. */ clock-frequency = <0>; }; + + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; };