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[13/38] ARM: dts: r8a7791: Add Inter Connect RAM

Message ID 5ccce438b9a58b9b99c3f847f7a40f3f8e48907b.1501514100.git.horms+renesas@verge.net.au (mailing list archive)
State Accepted
Commit 5ccce438b9a58b9b99c3f847f7a40f3f8e48907b
Headers show

Commit Message

Simon Horman July 31, 2017, 3:19 p.m. UTC 
From: Geert Uytterhoeven <geert+renesas@glider.be>

R-Car M2-W has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7791.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
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Patch

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index bd93f699ad84..f4748a9cb037 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -890,6 +890,16 @@ 
 		status = "disabled";
 	};
 
+	icram0:	sram@e63a0000 {
+		compatible = "mmio-sram";
+		reg = <0 0xe63a0000 0 0x12000>;
+	};
+
+	icram1:	sram@e63c0000 {
+		compatible = "mmio-sram";
+		reg = <0 0xe63c0000 0 0x1000>;
+	};
+
 	ether: ethernet@ee700000 {
 		compatible = "renesas,ether-r8a7791";
 		reg = <0 0xee700000 0 0x400>;