Message ID | 62d9dbbe-9f11-303c-56dd-3dcdaf48bcc1@cogentembedded.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Simon Horman |
Headers | show |
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980-condor.dts +++ renesas/arch/arm64/boot/dts/renesas/r8a77980-condor.dts @@ -49,6 +49,18 @@ clock-frequency = <32768>; }; +&pciec { + status = "okay"; +}; + +&pcie_bus_clk { + clock-frequency = <100000000>; +}; + +&pcie_phy { + status = "okay"; +}; + &scif0 { status = "okay"; };
Enable PCIe PHY and PCIEC and specify the PCIe bus clock for the Condor board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+)