Message ID | 73f61c34-d0ec-75cd-b6fd-a41cfb39078f@cogentembedded.com (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Simon Horman |
Headers | show |
On Thu, Jun 07, 2018 at 11:19:31PM +0300, Sergei Shtylyov wrote: > Describe FCPVD0 in the R8A77980 device tree; it will be used by VSPD0 in > the next patch... > > Based on the original (and large) patch by Vladimir Barinov. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Hi, This looks fine to me but I will wait for the dependencies of this series to land and to see if there are other reviews before applying. Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Hi Sergei, Thank you for the patch. On Thursday, 7 June 2018 23:19:31 EEST Sergei Shtylyov wrote: > Describe FCPVD0 in the R8A77980 device tree; it will be used by VSPD0 in > the next patch... > > Based on the original (and large) patch by Vladimir Barinov. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > arch/arm64/boot/dts/renesas/r8a77980.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi > =================================================================== > --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi > +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi > @@ -653,6 +653,14 @@ > resets = <&cpg 408>; > }; > > + fcpvd0: fcp@fea27000 { > + compatible = "renesas,fcpv"; > + reg = <0 0xfea27000 0 0x200>; > + clocks = <&cpg CPG_MOD 603>; > + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; > + resets = <&cpg 603>; > + }; > + > prr: chipid@fff00044 { > compatible = "renesas,prr"; > reg = <0 0xfff00044 0 4>;
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -653,6 +653,14 @@ resets = <&cpg 408>; }; + fcpvd0: fcp@fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 603>; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>;