From patchwork Mon Apr 25 04:27:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8922771 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 279B5BF29F for ; Mon, 25 Apr 2016 04:28:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7B2BD20107 for ; Mon, 25 Apr 2016 04:28:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B24A520155 for ; Mon, 25 Apr 2016 04:28:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753490AbcDYE16 (ORCPT ); Mon, 25 Apr 2016 00:27:58 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:35029 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753495AbcDYE15 (ORCPT ); Mon, 25 Apr 2016 00:27:57 -0400 Received: from penelope.kanocho.kobe.vergenet.net (124-171-1-229.dyn.iinet.net.au [124.171.1.229]) by kirsty.vergenet.net (Postfix) with ESMTPSA id 0770C25BE79; Mon, 25 Apr 2016 14:27:44 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1461558464; bh=5TQI4pOjwzl52RA/tKVzUrz8Fum+65IeBISYjiCRbyM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RAf+p5JFzJ1yxnrNrKErnCoVjTiXuVLO3rvKA/LYqGau0l3mpfByjEiMu38ie2twH Tefn9r/6iQk7T8AAzcTh91qsPkKch9jmppytbLK5uVyjHIu+uSa/SPcSIBuVqyVVQY Sl67/hjBheg3+rvqHOzGaAnOLwQyrb6cWJkGTaUY= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id 5774F60B6D; Mon, 25 Apr 2016 14:27:41 +1000 (AEST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Simon Horman Subject: [PATCH 09/22] ARM: dts: r8a7793: add CAN clocks to device tree Date: Mon, 25 Apr 2016 14:27:27 +1000 Message-Id: <7892e6c1be78a7b008722badd99e5abd0ad6007b.1461558315.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.7.0.rc3.207.g0ac5344 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-7.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and external clock fed on CAN_CLK pin. Describe those clocks in the device tree along with the USB_EXTAL clock from which clkp2 is derived. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7793.dtsi | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 95bbed95b0c1..0e609bdafaa9 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -839,6 +839,22 @@ clock-frequency = <0>; }; + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + /* External CAN clock */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + status = "disabled"; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; @@ -853,7 +869,7 @@ compatible = "renesas,r8a7793-cpg-clocks", "renesas,rcar-gen2-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; + clocks = <&extal_clk &usb_extal_clk>; #clock-cells = <1>; clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "z", @@ -1081,6 +1097,7 @@ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&p_clk>, <&p_clk>, <&cpg_clocks R8A7793_CLK_QSPI>, <&hp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; @@ -1090,7 +1107,8 @@ R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4 R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2 R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0 - R8A7793_CLK_QSPI_MOD R8A7793_CLK_I2C5 + R8A7793_CLK_QSPI_MOD R8A7793_CLK_RCAN1 + R8A7793_CLK_RCAN0 R8A7793_CLK_I2C5 R8A7793_CLK_IICDVFS R8A7793_CLK_I2C4 R8A7793_CLK_I2C3 R8A7793_CLK_I2C2 R8A7793_CLK_I2C1 R8A7793_CLK_I2C0 @@ -1098,8 +1116,9 @@ clock-output-names = "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", - "qspi_mod", "i2c5", "i2c6", "i2c4", - "i2c3", "i2c2", "i2c1", "i2c0"; + "rcan1", "rcan0", "qspi_mod", "i2c5", + "i2c6", "i2c4", "i2c3", "i2c2", "i2c1", + "i2c0"; }; mstp10_clks: mstp10_clks@e6150998 { compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";