From patchwork Fri Feb 26 00:07:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8428231 Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BB28CC0553 for ; Fri, 26 Feb 2016 00:08:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 364F220361 for ; Fri, 26 Feb 2016 00:08:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 509F520384 for ; Fri, 26 Feb 2016 00:08:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752768AbcBZAHz (ORCPT ); Thu, 25 Feb 2016 19:07:55 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:43090 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752659AbcBZAHy (ORCPT ); Thu, 25 Feb 2016 19:07:54 -0500 Received: from penelope.kanocho.kobe.vergenet.net (aa046235.ppp.asahi-net.or.jp [110.5.46.235]) by kirsty.vergenet.net (Postfix) with ESMTPSA id 9E0A125B810; Fri, 26 Feb 2016 11:07:50 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1456445270; bh=9RD4yaa5URDvWA73H9TjCsuqJqH0XvCOIQN+S+eMohw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CRnpumCSYbQVSh7JppFRO2MUUUq/lfYR4D8tEG6bVs348VujmmSCJGK1JWQ42t/Vn 1J/W2ifgeQfY8mFq7+EurCfHu6FnDLHk1SohkNZR6uQB8eXHNqkHC/qIe57DDiw69p h8TIkHO23ByJRPeplCdCi0VdyHB+6bY8+fksZoAg= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id 8460D60984; Fri, 26 Feb 2016 11:07:48 +1100 (AEDT) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Geert Uytterhoeven , Dirk Behme , Simon Horman Subject: [PATCH 01/14] arm64: dts: r8a7795: Add L2 cache-controller nodes Date: Fri, 26 Feb 2016 09:07:34 +0900 Message-Id: <7b337e61a4104d5a0abde1e733916de2208800e6.1456445161.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.7.0.rc3.207.g0ac5344 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add device nodes for the L2 caches, and link the CPU node to its L2 cache node. The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as 128 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven Signed-off-by: Dirk Behme Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 9634e3a4858e..3f00e85641a8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -39,6 +39,7 @@ compatible = "arm,cortex-a57", "arm,armv8"; reg = <0x0>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -46,22 +47,29 @@ compatible = "arm,cortex-a57","arm,armv8"; reg = <0x1>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a57_2: cpu@2 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x2>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; a57_3: cpu@3 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x3>; device_type = "cpu"; + next-level-cache = <&L2_CA57>; enable-method = "psci"; }; }; + L2_CA57: cache-controller@0 { + compatible = "cache"; + }; + extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>;