diff mbox

arm64: renesas: r8a7795: tidyup audma definition order

Message ID 878tr9yj82.wl%kuninori.morimoto.gx@renesas.com (mailing list archive)
State Rejected
Delegated to: Simon Horman
Headers show

Commit Message

Kuninori Morimoto Dec. 21, 2016, 4:56 a.m. UTC
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
Because of this order, dma can connect to ipmmu, but
audma can't connect to it.
This patch moves audma order as ipmmu -> dma -> audma.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 164 +++++++++++++++----------------
 1 file changed, 82 insertions(+), 82 deletions(-)

Comments

Kuninori Morimoto Jan. 25, 2017, 12:54 a.m. UTC | #1
Hi Simon

I want to know current status of this patch

> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> 
> Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
> Because of this order, dma can connect to ipmmu, but
> audma can't connect to it.
> This patch moves audma order as ipmmu -> dma -> audma.
> 
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 164 +++++++++++++++----------------
>  1 file changed, 82 insertions(+), 82 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index ede9f27..36c0b6e 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -337,88 +337,6 @@
>  			#power-domain-cells = <1>;
>  		};
>  
> -		audma0: dma-controller@ec700000 {
> -			compatible = "renesas,dmac-r8a7795",
> -				     "renesas,rcar-dmac";
> -			reg = <0 0xec700000 0 0x10000>;
> -			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "error",
> -					"ch0", "ch1", "ch2", "ch3",
> -					"ch4", "ch5", "ch6", "ch7",
> -					"ch8", "ch9", "ch10", "ch11",
> -					"ch12", "ch13", "ch14", "ch15";
> -			clocks = <&cpg CPG_MOD 502>;
> -			clock-names = "fck";
> -			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> -			#dma-cells = <1>;
> -			dma-channels = <16>;
> -			iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
> -			       <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
> -			       <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
> -			       <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
> -			       <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
> -			       <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
> -			       <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
> -			       <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
> -		};
> -
> -		audma1: dma-controller@ec720000 {
> -			compatible = "renesas,dmac-r8a7795",
> -				     "renesas,rcar-dmac";
> -			reg = <0 0xec720000 0 0x10000>;
> -			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
> -				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "error",
> -					"ch0", "ch1", "ch2", "ch3",
> -					"ch4", "ch5", "ch6", "ch7",
> -					"ch8", "ch9", "ch10", "ch11",
> -					"ch12", "ch13", "ch14", "ch15";
> -			clocks = <&cpg CPG_MOD 501>;
> -			clock-names = "fck";
> -			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> -			#dma-cells = <1>;
> -			dma-channels = <16>;
> -			iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
> -			       <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
> -			       <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
> -			       <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
> -			       <&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
> -			       <&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
> -			       <&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
> -			       <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
> -		};
> -
>  		pfc: pfc@e6060000 {
>  			compatible = "renesas,pfc-r8a7795";
>  			reg = <0 0xe6060000 0 0x50c>;
> @@ -675,6 +593,88 @@
>  			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
>  		};
>  
> +		audma0: dma-controller@ec700000 {
> +			compatible = "renesas,dmac-r8a7795",
> +				     "renesas,rcar-dmac";
> +			reg = <0 0xec700000 0 0x10000>;
> +			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "error",
> +					"ch0", "ch1", "ch2", "ch3",
> +					"ch4", "ch5", "ch6", "ch7",
> +					"ch8", "ch9", "ch10", "ch11",
> +					"ch12", "ch13", "ch14", "ch15";
> +			clocks = <&cpg CPG_MOD 502>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> +			#dma-cells = <1>;
> +			dma-channels = <16>;
> +			iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
> +			       <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
> +			       <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
> +			       <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
> +			       <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
> +			       <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
> +			       <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
> +			       <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
> +		};
> +
> +		audma1: dma-controller@ec720000 {
> +			compatible = "renesas,dmac-r8a7795",
> +				     "renesas,rcar-dmac";
> +			reg = <0 0xec720000 0 0x10000>;
> +			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
> +				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "error",
> +					"ch0", "ch1", "ch2", "ch3",
> +					"ch4", "ch5", "ch6", "ch7",
> +					"ch8", "ch9", "ch10", "ch11",
> +					"ch12", "ch13", "ch14", "ch15";
> +			clocks = <&cpg CPG_MOD 501>;
> +			clock-names = "fck";
> +			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> +			#dma-cells = <1>;
> +			dma-channels = <16>;
> +			iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
> +			       <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
> +			       <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
> +			       <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
> +			       <&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
> +			       <&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
> +			       <&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
> +			       <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
> +		};
> +
>  		avb: ethernet@e6800000 {
>  			compatible = "renesas,etheravb-r8a7795",
>  				     "renesas,etheravb-rcar-gen3";
> -- 
> 1.9.1
>
Geert Uytterhoeven Jan. 25, 2017, 2:38 p.m. UTC | #2
Hi Morimoto-san,

On Wed, Dec 21, 2016 at 5:56 AM, Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
> Because of this order, dma can connect to ipmmu, but
> audma can't connect to it.
> This patch moves audma order as ipmmu -> dma -> audma.

Does "[PATCH V7 00/11] IOMMU probe deferral support" help?
https://www.spinics.net/lists/arm-kernel/msg557110.html

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Kuninori Morimoto Jan. 26, 2017, 12:07 a.m. UTC | #3
Hi Geert

Thank you for your feedback

> > From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> >
> > Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
> > Because of this order, dma can connect to ipmmu, but
> > audma can't connect to it.
> > This patch moves audma order as ipmmu -> dma -> audma.
> 
> Does "[PATCH V7 00/11] IOMMU probe deferral support" help?
> https://www.spinics.net/lists/arm-kernel/msg557110.html

Maybe, Maybe not, i'm not sure.
But AudioDMAC is anyway located random position now.
I think AudioDMAC should be located close/next to DMAC node :)

Best regards
---
Kuninori Morimoto
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index ede9f27..36c0b6e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -337,88 +337,6 @@ 
 			#power-domain-cells = <1>;
 		};
 
-		audma0: dma-controller@ec700000 {
-			compatible = "renesas,dmac-r8a7795",
-				     "renesas,rcar-dmac";
-			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "error",
-					"ch0", "ch1", "ch2", "ch3",
-					"ch4", "ch5", "ch6", "ch7",
-					"ch8", "ch9", "ch10", "ch11",
-					"ch12", "ch13", "ch14", "ch15";
-			clocks = <&cpg CPG_MOD 502>;
-			clock-names = "fck";
-			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-			#dma-cells = <1>;
-			dma-channels = <16>;
-			iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
-			       <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
-			       <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
-			       <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
-			       <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
-			       <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
-			       <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
-			       <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
-		};
-
-		audma1: dma-controller@ec720000 {
-			compatible = "renesas,dmac-r8a7795",
-				     "renesas,rcar-dmac";
-			reg = <0 0xec720000 0 0x10000>;
-			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "error",
-					"ch0", "ch1", "ch2", "ch3",
-					"ch4", "ch5", "ch6", "ch7",
-					"ch8", "ch9", "ch10", "ch11",
-					"ch12", "ch13", "ch14", "ch15";
-			clocks = <&cpg CPG_MOD 501>;
-			clock-names = "fck";
-			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-			#dma-cells = <1>;
-			dma-channels = <16>;
-			iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
-			       <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
-			       <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
-			       <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
-			       <&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
-			       <&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
-			       <&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
-			       <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
-		};
-
 		pfc: pfc@e6060000 {
 			compatible = "renesas,pfc-r8a7795";
 			reg = <0 0xe6060000 0 0x50c>;
@@ -675,6 +593,88 @@ 
 			       <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 		};
 
+		audma0: dma-controller@ec700000 {
+			compatible = "renesas,dmac-r8a7795",
+				     "renesas,rcar-dmac";
+			reg = <0 0xec700000 0 0x10000>;
+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14", "ch15";
+			clocks = <&cpg CPG_MOD 502>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			#dma-cells = <1>;
+			dma-channels = <16>;
+			iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
+			       <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
+			       <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
+			       <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
+			       <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
+			       <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
+			       <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
+			       <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
+		};
+
+		audma1: dma-controller@ec720000 {
+			compatible = "renesas,dmac-r8a7795",
+				     "renesas,rcar-dmac";
+			reg = <0 0xec720000 0 0x10000>;
+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14", "ch15";
+			clocks = <&cpg CPG_MOD 501>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			#dma-cells = <1>;
+			dma-channels = <16>;
+			iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
+			       <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
+			       <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
+			       <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
+			       <&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
+			       <&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
+			       <&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
+			       <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
+		};
+
 		avb: ethernet@e6800000 {
 			compatible = "renesas,etheravb-r8a7795",
 				     "renesas,etheravb-rcar-gen3";