| Message ID | 87lgq39bt4.wl%kuninori.morimoto.gx@renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
Hi Morimoto-san, On Fri, May 12, 2017 at 2:13 AM, Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> wrote: > From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > > Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> But before I queue it in sh-pfc-for-v4.13, I would like to have a clarification. > +static const unsigned int ssi34_ctrl_pins[] = { > + /* SCK, WS */ > + RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), > +}; > +static const unsigned int ssi34_ctrl_mux[] = { > + SSI_SCK34_MARK, SSI_WS34_MARK, > +}; I'm a bit confused by this group: in the R-Car M3 Pin Function Rev. 0.54 sheet, these are named SCK349 resp. WS349. According to the history, the change from {SCK,WS}34 to {SCK,WS}349 was made at the same time as the change from {SCK,WS}0129 to {SCK,WS}01239. However, the former change is not reflected in the PFC section of the Hardware User's Manual. So which is correct: {SCK,WS}34 or {SCK,WS}349? Can you please enlighten me? Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert > > +static const unsigned int ssi34_ctrl_pins[] = { > > + /* SCK, WS */ > > + RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), > > +}; > > +static const unsigned int ssi34_ctrl_mux[] = { > > + SSI_SCK34_MARK, SSI_WS34_MARK, > > +}; > > I'm a bit confused by this group: in the R-Car M3 Pin Function Rev. 0.54 > sheet, these are named SCK349 resp. WS349. According to the history, the > change from {SCK,WS}34 to {SCK,WS}349 was made at the same time as the > change from {SCK,WS}0129 to {SCK,WS}01239. > However, the former change is not reflected in the PFC section of the > Hardware User's Manual. > > So which is correct: {SCK,WS}34 or {SCK,WS}349? > > Can you please enlighten me? It seems SSI_SCK 0129 -> 01239 was happen on v0.51 timing, SSI_SCK 34 -> 349 was happen on v0.54 timing. r8a7795 is still using old (= 34) naming now. I can adjust it both r8a7795/6. Do you want to v3 patch for r8a7796 ? or incremental patch is OK with r8a7795 ? Best regards --- Kuninori Morimoto
Hi Morimoto-san, On Mon, May 15, 2017 at 2:23 AM, Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> wrote: >> > +static const unsigned int ssi34_ctrl_pins[] = { >> > + /* SCK, WS */ >> > + RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), >> > +}; >> > +static const unsigned int ssi34_ctrl_mux[] = { >> > + SSI_SCK34_MARK, SSI_WS34_MARK, >> > +}; >> >> I'm a bit confused by this group: in the R-Car M3 Pin Function Rev. 0.54 >> sheet, these are named SCK349 resp. WS349. According to the history, the >> change from {SCK,WS}34 to {SCK,WS}349 was made at the same time as the >> change from {SCK,WS}0129 to {SCK,WS}01239. >> However, the former change is not reflected in the PFC section of the >> Hardware User's Manual. >> >> So which is correct: {SCK,WS}34 or {SCK,WS}349? >> >> Can you please enlighten me? > > It seems > SSI_SCK 0129 -> 01239 was happen on v0.51 timing, > SSI_SCK 34 -> 349 was happen on v0.54 timing. In the pin function spreadsheets, the changes were made together, in June 2016. > r8a7795 is still using old (= 34) naming now. Does this affect H3 ES1.0, too? My main worry there is that the name "ssi34_ctrl" is part of the DT ABI, so we have to keep that as an alias for "ssi349_ctrl". > I can adjust it both r8a7795/6. > Do you want to v3 patch for r8a7796 ? > or incremental patch is OK with r8a7795 ? As long as I haven't sent a pull request for sh-pfc-for-v4.13, it can still be fixed incrementally. Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert > > r8a7795 is still using old (= 34) naming now. > > Does this affect H3 ES1.0, too? > My main worry there is that the name "ssi34_ctrl" is part of the DT ABI, > so we have to keep that as an alias for "ssi349_ctrl". I think this is from Gen3, not ESx. And no-one is using SSI34 on upstream code. Should we care about out-of-tree user ? > > I can adjust it both r8a7795/6. > > Do you want to v3 patch for r8a7796 ? > > or incremental patch is OK with r8a7795 ? > > As long as I haven't sent a pull request for sh-pfc-for-v4.13, it can still be > fixed incrementally. OK. will do in v3 Best regards --- Kuninori Morimoto
Hi Morimoto-san, On Mon, May 15, 2017 at 11:07 AM, Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> wrote: >> > r8a7795 is still using old (= 34) naming now. >> >> Does this affect H3 ES1.0, too? >> My main worry there is that the name "ssi34_ctrl" is part of the DT ABI, >> so we have to keep that as an alias for "ssi349_ctrl". > > I think this is from Gen3, not ESx. > And no-one is using SSI34 on upstream code. > Should we care about out-of-tree user ? Probably not, especially for H3 ES1.x. >> > I can adjust it both r8a7795/6. >> > Do you want to v3 patch for r8a7796 ? >> > or incremental patch is OK with r8a7795 ? >> >> As long as I haven't sent a pull request for sh-pfc-for-v4.13, it can still be >> fixed incrementally. > > OK. will do in v3 OK, thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert > >> Does this affect H3 ES1.0, too? > >> My main worry there is that the name "ssi34_ctrl" is part of the DT ABI, > >> so we have to keep that as an alias for "ssi349_ctrl". > > > > I think this is from Gen3, not ESx. > > And no-one is using SSI34 on upstream code. > > Should we care about out-of-tree user ? > > Probably not, especially for H3 ES1.x. Sorry, I didn't explain. This is from Gen3, and ES1.x version datasheet has typo. But datasheet team no more update for it. For example on v0.5 datasheet (= for ES1.x) 6. Pin Function Controller (PFC) 6.2.2 GPIO/Peripheral Function Select Register (GPSR0-7) This has SSI_xxx_0129 (= this is typo), but 41. Serial Sound Interface Unit (SSIU) 41.1.3 External Pins This has SSI_xxx_01239 Can you agree about SSI_xxx_01239 / SSI_349 are from Gen3, not ES1.x ? > > OK. will do in v3 > > OK, thanks! Oops, sorry, not v3, but incremental patch. I will post this patch (= fixup SSI_349) if I could find my posted patches on your sh-pfc-for-v4.13. Best regards --- Kuninori Morimoto
Hi Morimoto-san, On Tue, May 16, 2017 at 3:25 AM, Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> wrote: >> >> Does this affect H3 ES1.0, too? >> >> My main worry there is that the name "ssi34_ctrl" is part of the DT ABI, >> >> so we have to keep that as an alias for "ssi349_ctrl". >> > >> > I think this is from Gen3, not ESx. >> > And no-one is using SSI34 on upstream code. >> > Should we care about out-of-tree user ? >> >> Probably not, especially for H3 ES1.x. > > Sorry, I didn't explain. > This is from Gen3, and ES1.x version datasheet has typo. > But datasheet team no more update for it. > > For example on v0.5 datasheet (= for ES1.x) > > 6. Pin Function Controller (PFC) > 6.2.2 GPIO/Peripheral Function Select Register (GPSR0-7) > > This has SSI_xxx_0129 (= this is typo), but > > 41. Serial Sound Interface Unit (SSIU) > 41.1.3 External Pins > > This has SSI_xxx_01239 OK. > Can you agree about SSI_xxx_01239 / SSI_349 are from Gen3, not ES1.x ? Yes, I agree. >> > OK. will do in v3 >> >> OK, thanks! > > Oops, sorry, not v3, but incremental patch. > I will post this patch (= fixup SSI_349) if I could find my posted patches > on your sh-pfc-for-v4.13. Oops,I thought I had pushed {clk-renesas,sh-pfc}-for-v4.13 yesterday, but apparently I got interrupted. Done. But kernel.org mirroring seems to be slow (latest are based on v4.12-rc1, not v4.11-rc1). Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index c0f3763..de2b6d7 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c @@ -3475,6 +3475,183 @@ enum { SD3_DS_MARK, }; +/* - SSI -------------------------------------------------------------------- */ +static const unsigned int ssi0_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 2), +}; +static const unsigned int ssi0_data_mux[] = { + SSI_SDATA0_MARK, +}; +static const unsigned int ssi01239_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1), +}; +static const unsigned int ssi01239_ctrl_mux[] = { + SSI_SCK01239_MARK, SSI_WS01239_MARK, +}; +static const unsigned int ssi1_data_a_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 3), +}; +static const unsigned int ssi1_data_a_mux[] = { + SSI_SDATA1_A_MARK, +}; +static const unsigned int ssi1_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int ssi1_data_b_mux[] = { + SSI_SDATA1_B_MARK, +}; +static const unsigned int ssi1_ctrl_a_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), +}; +static const unsigned int ssi1_ctrl_a_mux[] = { + SSI_SCK1_A_MARK, SSI_WS1_A_MARK, +}; +static const unsigned int ssi1_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 21), +}; +static const unsigned int ssi1_ctrl_b_mux[] = { + SSI_SCK1_B_MARK, SSI_WS1_B_MARK, +}; +static const unsigned int ssi2_data_a_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 4), +}; +static const unsigned int ssi2_data_a_mux[] = { + SSI_SDATA2_A_MARK, +}; +static const unsigned int ssi2_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(5, 13), +}; +static const unsigned int ssi2_data_b_mux[] = { + SSI_SDATA2_B_MARK, +}; +static const unsigned int ssi2_ctrl_a_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 21), +}; +static const unsigned int ssi2_ctrl_a_mux[] = { + SSI_SCK2_A_MARK, SSI_WS2_A_MARK, +}; +static const unsigned int ssi2_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), +}; +static const unsigned int ssi2_ctrl_b_mux[] = { + SSI_SCK2_B_MARK, SSI_WS2_B_MARK, +}; +static const unsigned int ssi3_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 7), +}; +static const unsigned int ssi3_data_mux[] = { + SSI_SDATA3_MARK, +}; +static const unsigned int ssi34_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 5), RCAR_GP_PIN(6, 6), +}; +static const unsigned int ssi34_ctrl_mux[] = { + SSI_SCK34_MARK, SSI_WS34_MARK, +}; +static const unsigned int ssi4_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int ssi4_data_mux[] = { + SSI_SDATA4_MARK, +}; +static const unsigned int ssi4_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int ssi4_ctrl_mux[] = { + SSI_SCK4_MARK, SSI_WS4_MARK, +}; +static const unsigned int ssi5_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 13), +}; +static const unsigned int ssi5_data_mux[] = { + SSI_SDATA5_MARK, +}; +static const unsigned int ssi5_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 11), RCAR_GP_PIN(6, 12), +}; +static const unsigned int ssi5_ctrl_mux[] = { + SSI_SCK5_MARK, SSI_WS5_MARK, +}; +static const unsigned int ssi6_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 16), +}; +static const unsigned int ssi6_data_mux[] = { + SSI_SDATA6_MARK, +}; +static const unsigned int ssi6_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), +}; +static const unsigned int ssi6_ctrl_mux[] = { + SSI_SCK6_MARK, SSI_WS6_MARK, +}; +static const unsigned int ssi7_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 19), +}; +static const unsigned int ssi7_data_mux[] = { + SSI_SDATA7_MARK, +}; +static const unsigned int ssi78_ctrl_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int ssi78_ctrl_mux[] = { + SSI_SCK78_MARK, SSI_WS78_MARK, +}; +static const unsigned int ssi8_data_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 20), +}; +static const unsigned int ssi8_data_mux[] = { + SSI_SDATA8_MARK, +}; +static const unsigned int ssi9_data_a_pins[] = { + /* SDATA */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int ssi9_data_a_mux[] = { + SSI_SDATA9_A_MARK, +}; +static const unsigned int ssi9_data_b_pins[] = { + /* SDATA */ + RCAR_GP_PIN(5, 14), +}; +static const unsigned int ssi9_data_b_mux[] = { + SSI_SDATA9_B_MARK, +}; +static const unsigned int ssi9_ctrl_a_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), +}; +static const unsigned int ssi9_ctrl_a_mux[] = { + SSI_SCK9_A_MARK, SSI_WS9_A_MARK, +}; +static const unsigned int ssi9_ctrl_b_pins[] = { + /* SCK, WS */ + RCAR_GP_PIN(6, 30), RCAR_GP_PIN(6, 31), +}; +static const unsigned int ssi9_ctrl_b_mux[] = { + SSI_SCK9_B_MARK, SSI_WS9_B_MARK, +}; + static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(avb_link), SH_PFC_PIN_GROUP(avb_magic), @@ -3732,6 +3909,31 @@ enum { SH_PFC_PIN_GROUP(sdhi3_cd), SH_PFC_PIN_GROUP(sdhi3_wp), SH_PFC_PIN_GROUP(sdhi3_ds), + SH_PFC_PIN_GROUP(ssi0_data), + SH_PFC_PIN_GROUP(ssi01239_ctrl), + SH_PFC_PIN_GROUP(ssi1_data_a), + SH_PFC_PIN_GROUP(ssi1_data_b), + SH_PFC_PIN_GROUP(ssi1_ctrl_a), + SH_PFC_PIN_GROUP(ssi1_ctrl_b), + SH_PFC_PIN_GROUP(ssi2_data_a), + SH_PFC_PIN_GROUP(ssi2_data_b), + SH_PFC_PIN_GROUP(ssi2_ctrl_a), + SH_PFC_PIN_GROUP(ssi2_ctrl_b), + SH_PFC_PIN_GROUP(ssi3_data), + SH_PFC_PIN_GROUP(ssi34_ctrl), + SH_PFC_PIN_GROUP(ssi4_data), + SH_PFC_PIN_GROUP(ssi4_ctrl), + SH_PFC_PIN_GROUP(ssi5_data), + SH_PFC_PIN_GROUP(ssi5_ctrl), + SH_PFC_PIN_GROUP(ssi6_data), + SH_PFC_PIN_GROUP(ssi6_ctrl), + SH_PFC_PIN_GROUP(ssi7_data), + SH_PFC_PIN_GROUP(ssi78_ctrl), + SH_PFC_PIN_GROUP(ssi8_data), + SH_PFC_PIN_GROUP(ssi9_data_a), + SH_PFC_PIN_GROUP(ssi9_data_b), + SH_PFC_PIN_GROUP(ssi9_ctrl_a), + SH_PFC_PIN_GROUP(ssi9_ctrl_b), }; static const char * const avb_groups[] = { @@ -4113,6 +4315,34 @@ enum { "sdhi3_ds", }; +static const char * const ssi_groups[] = { + "ssi0_data", + "ssi01239_ctrl", + "ssi1_data_a", + "ssi1_data_b", + "ssi1_ctrl_a", + "ssi1_ctrl_b", + "ssi2_data_a", + "ssi2_data_b", + "ssi2_ctrl_a", + "ssi2_ctrl_b", + "ssi3_data", + "ssi34_ctrl", + "ssi4_data", + "ssi4_ctrl", + "ssi5_data", + "ssi5_ctrl", + "ssi6_data", + "ssi6_ctrl", + "ssi7_data", + "ssi78_ctrl", + "ssi8_data", + "ssi9_data_a", + "ssi9_data_b", + "ssi9_ctrl_a", + "ssi9_ctrl_b", +}; + static const struct sh_pfc_function pinmux_functions[] = { SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(can0), @@ -4155,6 +4385,7 @@ enum { SH_PFC_FUNCTION(sdhi1), SH_PFC_FUNCTION(sdhi2), SH_PFC_FUNCTION(sdhi3), + SH_PFC_FUNCTION(ssi), }; static const struct pinmux_cfg_reg pinmux_config_regs[] = {