diff mbox series

[v3,05/21] pinctrl: renesas: r8a779g0: remove not used NOGP definitions

Message ID 87wndjkcpm.wl-kuninori.morimoto.gx@renesas.com (mailing list archive)
State Superseded
Delegated to: Geert Uytterhoeven
Headers show
Series pinctrl: renesas: r8a779g0: Add pins, groups and functions | expand

Commit Message

Kuninori Morimoto June 14, 2022, 5:59 a.m. UTC 
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Current V4H PFC code has many NOGP definitions. But these are not used,
and it is different from original usage. This patch removes these.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 drivers/pinctrl/renesas/pfc-r8a779g0.c | 17 -----------------
 1 file changed, 17 deletions(-)

Comments

Geert Uytterhoeven June 17, 2022, 3:16 p.m. UTC | #1 
Hi Morimoto-san,

On Tue, Jun 14, 2022 at 7:59 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> Current V4H PFC code has many NOGP definitions. But these are not used,
> and it is different from original usage. This patch removes these.
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
> @@ -43,22 +43,6 @@
>         PORT_GP_CFG_21(7,       fn, sfx, CFG_FLAGS),                                    \
>         PORT_GP_CFG_14(8,       fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33)
>
> -#define CPU_ALL_NOGP(fn)                                                                       \
> -       PIN_NOGP_CFG(PRESETOUT_N,       "PRESETOUT#",   fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),       \
> -       PIN_NOGP_CFG(PRESETOUT0_N,      "PRESETOUT0#",  fn, SH_PFC_PIN_CFG_PULL_DOWN),          \
> -       PIN_NOGP_CFG(PRESETOUT1_N,      "PRESETOUT1#",  fn, SH_PFC_PIN_CFG_PULL_DOWN),          \
> -       PIN_NOGP_CFG(EXTALR,            "EXTALR",       fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),       \
> -       PIN_NOGP_CFG(DCUTRST0_N,        "DCUTRST0#",    fn, SH_PFC_PIN_CFG_PULL_DOWN),          \
> -       PIN_NOGP_CFG(DCUTCK0,           "DCUTCK0",      fn, SH_PFC_PIN_CFG_PULL_UP),            \
> -       PIN_NOGP_CFG(DCUTMS0,           "DCUTMS0",      fn, SH_PFC_PIN_CFG_PULL_UP),            \
> -       PIN_NOGP_CFG(DCUTDI0,           "DCUTDI0",      fn, SH_PFC_PIN_CFG_PULL_UP),            \
> -       PIN_NOGP_CFG(DCUTRST1_N,        "DCUTRST1#",    fn, SH_PFC_PIN_CFG_PULL_DOWN),          \
> -       PIN_NOGP_CFG(DCUTCK1,           "DCUTCK1",      fn, SH_PFC_PIN_CFG_PULL_UP),            \
> -       PIN_NOGP_CFG(DCUTMS1,           "DCUTMS1",      fn, SH_PFC_PIN_CFG_PULL_UP),            \
> -       PIN_NOGP_CFG(DCUTDI1,           "DCUTDI1",      fn, SH_PFC_PIN_CFG_PULL_UP),            \
> -       PIN_NOGP_CFG(EVTI_N,            "EVTI#",        fn, SH_PFC_PIN_CFG_PULL_UP),            \
> -       PIN_NOGP_CFG(MSYN_N,            "MSYN#",        fn, SH_PFC_PIN_CFG_PULL_UP)

As several of the NOGP definitions are wrong, I prefer to never
include them.

> -
>  /* GPSR0 */
>  #define GPSR0_18       F_(MSIOF2_RXD,          IP2SR0_11_8)
>  #define GPSR0_17       F_(MSIOF2_SCK,          IP2SR0_7_4)
> @@ -1204,7 +1188,6 @@ static const u16 pinmux_data[] = {
>   */
>  enum {
>         GP_ASSIGN_LAST(),
> -       NOGP_ALL(),
>  };
>
>  static const struct sh_pfc_pin pinmux_pins[] = {

As the definitions are not used anyway, and don't have any impact on
other enums (they're last in the list), I think it is safe to fold
this into "[PATCH v3 03/21] pinctrl: renesas: Initial R8A779G0 (V4H)
PFC support".

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index d42470b54d50..1716399350dc 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -43,22 +43,6 @@ 
 	PORT_GP_CFG_21(7,	fn, sfx, CFG_FLAGS),					\
 	PORT_GP_CFG_14(8,	fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE_18_33)
 
-#define CPU_ALL_NOGP(fn)									\
-	PIN_NOGP_CFG(PRESETOUT_N,	"PRESETOUT#",	fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),	\
-	PIN_NOGP_CFG(PRESETOUT0_N,	"PRESETOUT0#",	fn, SH_PFC_PIN_CFG_PULL_DOWN),		\
-	PIN_NOGP_CFG(PRESETOUT1_N,	"PRESETOUT1#",	fn, SH_PFC_PIN_CFG_PULL_DOWN),		\
-	PIN_NOGP_CFG(EXTALR,		"EXTALR",	fn, SH_PFC_PIN_CFG_PULL_UP_DOWN),	\
-	PIN_NOGP_CFG(DCUTRST0_N,	"DCUTRST0#",	fn, SH_PFC_PIN_CFG_PULL_DOWN),		\
-	PIN_NOGP_CFG(DCUTCK0,		"DCUTCK0",	fn, SH_PFC_PIN_CFG_PULL_UP),		\
-	PIN_NOGP_CFG(DCUTMS0,		"DCUTMS0",	fn, SH_PFC_PIN_CFG_PULL_UP),		\
-	PIN_NOGP_CFG(DCUTDI0,		"DCUTDI0",	fn, SH_PFC_PIN_CFG_PULL_UP),		\
-	PIN_NOGP_CFG(DCUTRST1_N,	"DCUTRST1#",	fn, SH_PFC_PIN_CFG_PULL_DOWN),		\
-	PIN_NOGP_CFG(DCUTCK1,		"DCUTCK1",	fn, SH_PFC_PIN_CFG_PULL_UP),		\
-	PIN_NOGP_CFG(DCUTMS1,		"DCUTMS1",	fn, SH_PFC_PIN_CFG_PULL_UP),		\
-	PIN_NOGP_CFG(DCUTDI1,		"DCUTDI1",	fn, SH_PFC_PIN_CFG_PULL_UP),		\
-	PIN_NOGP_CFG(EVTI_N,		"EVTI#",	fn, SH_PFC_PIN_CFG_PULL_UP),		\
-	PIN_NOGP_CFG(MSYN_N,		"MSYN#",	fn, SH_PFC_PIN_CFG_PULL_UP)
-
 /* GPSR0 */
 #define GPSR0_18	F_(MSIOF2_RXD,		IP2SR0_11_8)
 #define GPSR0_17	F_(MSIOF2_SCK,		IP2SR0_7_4)
@@ -1204,7 +1188,6 @@  static const u16 pinmux_data[] = {
  */
 enum {
 	GP_ASSIGN_LAST(),
-	NOGP_ALL(),
 };
 
 static const struct sh_pfc_pin pinmux_pins[] = {