| Message ID | b9cea5b530a6d68ea921174fbbda60afb8dd4432.1704788539.git.ysato@users.sourceforge.jp (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Device Tree support for SH7751 based board | expand |
On 09/01/2024 09:23, Yoshinori Sato wrote: > Renesas SH7751 Interrupt controller priority register define. > Still not a binding. Some parts of my comments are implemented, others are just ignored (dropping the file, fixing full stop in commit msg). This is confusing. I don't know. Shall I just NAK it to make it clear? NAK Best regards, Krzysztof
diff --git a/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h new file mode 100644 index 000000000000..0543bd1b895e --- /dev/null +++ b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * SH3/4 INTC IPR register offsets (Address / bits) + */ + +#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC +#define __DT_BINDINGS_RENESAS_SH7751_INTC + +#define IPRA 0 +#define IPRB 4 +#define IPRC 8 +#define IPRD 12 +#define INTPRI00 256 +#define IPR_B12 12 +#define IPR_B8 8 +#define IPR_B4 4 +#define IPR_B0 0 + +#endif
Renesas SH7751 Interrupt controller priority register define. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> --- .../renesas,sh7751-intc.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h