diff mbox

[13/42] ARM: dts: iwg22d-sodimm: Enable internal PCI

Message ID bc058f6f03e47610c994a97ecf3bf8a3ea44efee.1508493785.git.horms+renesas@verge.net.au (mailing list archive)
State Accepted
Commit bc058f6f03e47610c994a97ecf3bf8a3ea44efee
Headers show

Commit Message

Simon Horman Oct. 20, 2017, 10:28 a.m. UTC 
From: Biju Das <biju.das@bp.renesas.com>

Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers
attached to them.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)
diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 8772c561e3a8..e378e5ecfcac 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -55,6 +55,11 @@ 
 		function = "sdhi0";
 		power-source = <3300>;
 	};
+
+	usb1_pins: usb1 {
+		groups = "usb1";
+		function = "usb1";
+	};
 };
 
 &scif4 {
@@ -92,3 +97,9 @@ 
 	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
 	status = "okay";
 };
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};