From patchwork Fri Apr 7 15:58:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 9669737 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A23E860364 for ; Fri, 7 Apr 2017 15:58:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9353028535 for ; Fri, 7 Apr 2017 15:58:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 87D3F28609; Fri, 7 Apr 2017 15:58:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B448B285E8 for ; Fri, 7 Apr 2017 15:58:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933451AbdDGP6M (ORCPT ); Fri, 7 Apr 2017 11:58:12 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:54577 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933347AbdDGP6L (ORCPT ); Fri, 7 Apr 2017 11:58:11 -0400 Received: from penelope.horms.nl (unknown [66.171.166.114]) by kirsty.vergenet.net (Postfix) with ESMTPSA id F127F25BE6A; Sat, 8 Apr 2017 01:58:05 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1491580686; bh=qM8eEbVfl0JqBz8MhXZ/qda1iD/ch+5mJUOlXts9W2g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bEwM9JYUsuuSlmqtabsmcaJlP3iC8E2lAdCyUITiR2eqnKF3Xe6wDFwAYDzEtDQj6 HmuhITrWSyoGQoEI29c1KeQGZPzXKHdUepiv4HCWvpdmx242T+2aFFfsYU4uuX4bQR 6Nn4jFwsvs5VAbHOncLlL+eYh5o630ogjc1uTnm4= Received: by penelope.horms.nl (Postfix, from userid 7100) id 9756D60746; Fri, 7 Apr 2017 17:58:03 +0200 (CEST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Geert Uytterhoeven , Simon Horman Subject: [PATCH 3/4] arm64: dts: r8a7796: Add reset control properties Date: Fri, 7 Apr 2017 11:58:01 -0400 Message-Id: X-Mailer: git-send-email 2.7.0.rc3.207.g0ac5344 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add properties to describe the reset topology for on-SoC devices: - Add the "#reset-cells" property to the CPG/MSSR device node, - Add resets and reset-names properties to the various device nodes. This allows to reset SoC devices using the Reset Controller API. Note that all resets added match the corresponding module clocks. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 46 ++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index a90abf14dc4e..2ec1ed5f4991 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -155,6 +155,7 @@ clocks = <&cpg CPG_MOD 408>; clock-names = "clk"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 408>; }; timer { @@ -175,6 +176,7 @@ reg = <0 0xe6020000 0 0x0c>; clocks = <&cpg CPG_MOD 402>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 402>; status = "disabled"; }; @@ -190,6 +192,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 912>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 912>; }; gpio1: gpio@e6051000 { @@ -204,6 +207,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 911>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 911>; }; gpio2: gpio@e6052000 { @@ -218,6 +222,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 910>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 910>; }; gpio3: gpio@e6053000 { @@ -232,6 +237,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 909>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 909>; }; gpio4: gpio@e6054000 { @@ -246,6 +252,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 908>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 908>; }; gpio5: gpio@e6055000 { @@ -260,6 +267,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 907>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 907>; }; gpio6: gpio@e6055400 { @@ -274,6 +282,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 906>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 906>; }; gpio7: gpio@e6055800 { @@ -288,6 +297,7 @@ interrupt-controller; clocks = <&cpg CPG_MOD 905>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 905>; }; pfc: pin-controller@e6060000 { @@ -322,6 +332,7 @@ clock-names = "extal", "extalr"; #clock-cells = <2>; #power-domain-cells = <0>; + #reset-cells = <1>; }; rst: reset-controller@e6160000 { @@ -350,6 +361,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 926>; status = "disabled"; }; @@ -362,6 +374,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 931>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 931>; dmas = <&dmac1 0x91>, <&dmac1 0x90>, <&dmac2 0x91>, <&dmac2 0x90>; dma-names = "tx", "rx", "tx", "rx"; @@ -378,6 +391,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 930>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 930>; dmas = <&dmac1 0x93>, <&dmac1 0x92>, <&dmac2 0x93>, <&dmac2 0x92>; dma-names = "tx", "rx", "tx", "rx"; @@ -394,6 +408,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 929>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 929>; dmas = <&dmac1 0x95>, <&dmac1 0x94>, <&dmac2 0x95>, <&dmac2 0x94>; dma-names = "tx", "rx", "tx", "rx"; @@ -410,6 +425,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 928>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 928>; dmas = <&dmac0 0x97>, <&dmac0 0x96>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; @@ -425,6 +441,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 927>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 927>; dmas = <&dmac0 0x99>, <&dmac0 0x98>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; @@ -440,6 +457,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 919>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 919>; dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <110>; @@ -455,6 +473,7 @@ interrupts = ; clocks = <&cpg CPG_MOD 918>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 918>; dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; dma-names = "tx", "rx"; i2c-scl-internal-delay-ns = <6>; @@ -473,6 +492,7 @@ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; assigned-clock-rates = <40000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 916>; status = "disabled"; }; @@ -488,6 +508,7 @@ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; assigned-clock-rates = <40000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 915>; status = "disabled"; }; @@ -504,6 +525,7 @@ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; assigned-clock-rates = <40000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 914>; status = "disabled"; channel0 { @@ -553,6 +575,7 @@ "ch24"; clocks = <&cpg CPG_MOD 812>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 812>; phy-mode = "rgmii-txid"; #address-cells = <1>; #size-cells = <0>; @@ -573,6 +596,7 @@ <&dmac2 0x31>, <&dmac2 0x30>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 520>; status = "disabled"; }; @@ -590,6 +614,7 @@ <&dmac2 0x33>, <&dmac2 0x32>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 519>; status = "disabled"; }; @@ -607,6 +632,7 @@ <&dmac2 0x35>, <&dmac2 0x34>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 518>; status = "disabled"; }; @@ -623,6 +649,7 @@ dmas = <&dmac0 0x37>, <&dmac0 0x36>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 517>; status = "disabled"; }; @@ -639,6 +666,7 @@ dmas = <&dmac0 0x39>, <&dmac0 0x38>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 516>; status = "disabled"; }; @@ -655,6 +683,7 @@ <&dmac2 0x51>, <&dmac2 0x50>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 207>; status = "disabled"; }; @@ -671,6 +700,7 @@ <&dmac2 0x53>, <&dmac2 0x52>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 206>; status = "disabled"; }; @@ -684,6 +714,7 @@ <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 310>; status = "disabled"; }; @@ -699,6 +730,7 @@ dmas = <&dmac0 0x57>, <&dmac0 0x56>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 204>; status = "disabled"; }; @@ -714,6 +746,7 @@ dmas = <&dmac0 0x59>, <&dmac0 0x58>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 203>; status = "disabled"; }; @@ -730,6 +763,7 @@ <&dmac2 0x5b>, <&dmac2 0x5a>; dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 202>; status = "disabled"; }; @@ -743,6 +777,7 @@ <&dmac2 0x41>, <&dmac2 0x40>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 211>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -758,6 +793,7 @@ <&dmac2 0x43>, <&dmac2 0x42>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 210>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -772,6 +808,7 @@ dmas = <&dmac0 0x45>, <&dmac0 0x44>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 209>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -786,6 +823,7 @@ dmas = <&dmac0 0x47>, <&dmac0 0x46>; dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 208>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -820,6 +858,7 @@ clocks = <&cpg CPG_MOD 219>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 219>; #dma-cells = <1>; dma-channels = <16>; }; @@ -853,6 +892,7 @@ clocks = <&cpg CPG_MOD 218>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 218>; #dma-cells = <1>; dma-channels = <16>; }; @@ -886,6 +926,7 @@ clocks = <&cpg CPG_MOD 217>; clock-names = "fck"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 217>; #dma-cells = <1>; dma-channels = <16>; }; @@ -897,6 +938,7 @@ clocks = <&cpg CPG_MOD 314>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 314>; status = "disabled"; }; @@ -907,6 +949,7 @@ clocks = <&cpg CPG_MOD 313>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 313>; status = "disabled"; }; @@ -917,6 +960,7 @@ clocks = <&cpg CPG_MOD 312>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 312>; status = "disabled"; }; @@ -927,6 +971,7 @@ clocks = <&cpg CPG_MOD 311>; max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 311>; status = "disabled"; }; @@ -940,6 +985,7 @@ ; clocks = <&cpg CPG_MOD 522>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 522>; #thermal-sensor-cells = <1>; status = "okay"; };