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[GIT,PULL] clk: renesas: Updates for v6.14

Message ID cover.1734689961.git.geert+renesas@glider.be (mailing list archive)
State New
Headers show
Series [GIT,PULL] clk: renesas: Updates for v6.14 | expand

Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.14-tag1

Message

Geert Uytterhoeven Dec. 20, 2024, 10:29 a.m. UTC
Hi Mike, Stephen,

The following changes since commit 40384c840ea1944d7c5a392e8975ed088ecf0b37:

  Linux 6.13-rc1 (2024-12-01 14:28:56 -0800)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.14-tag1

for you to fetch changes up to f962745289958e89bf520407728e384e52ea8e27:

  clk: renesas: r9a08g045: Add clocks, resets and power domain support for the ADC IP (2024-12-10 12:02:24 +0100)

----------------------------------------------------------------
clk: renesas: Updates for v6.14

  - Add sound (SSI), remaining serial (SCIF), and ADC clocks, resets,
    and power domains on RZ/G3S,
  - Add system restart support on RZ/N1,
  - Add camera clocks and resets on RZ/V2H(P),
  - Add display clocks on R-Car V4M,
  - Miscellaneous fixes and improvements.

Thanks for pulling!

----------------------------------------------------------------
Claudiu Beznea (3):
      clk: renesas: r9a08g045: Add clocks, resets and power domains support for SSI
      clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs
      clk: renesas: r9a08g045: Add clocks, resets and power domain support for the ADC IP

Javier Carrasco (1):
      clk: renesas: cpg-mssr: Fix 'soc' node handling in cpg_mssr_reserved_init()

Lad Prabhakar (2):
      clk: renesas: rzv2h: Add selective Runtime PM support for clocks
      clk: renesas: r9a09g057: Add support for PLLVDO, CRU clocks, and resets

Tomi Valkeinen (1):
      clk: renesas: r8a779h0: Add display clocks

Wolfram Sang (2):
      clk: renesas: r9a06g032: Add restart handler
      clk: renesas: r9a06g032: Use BIT macro consistently

 drivers/clk/renesas/r8a779h0-cpg-mssr.c |  4 +++
 drivers/clk/renesas/r9a06g032-clocks.c  | 29 +++++++++++++++++++-
 drivers/clk/renesas/r9a08g045-cpg.c     | 47 +++++++++++++++++++++++++++++++++
 drivers/clk/renesas/r9a09g057-cpg.c     | 45 +++++++++++++++++++++++++++++++
 drivers/clk/renesas/renesas-cpg-mssr.c  |  2 +-
 drivers/clk/renesas/rzv2h-cpg.c         | 44 +++++++++++++++++++++++++++---
 drivers/clk/renesas/rzv2h-cpg.h         | 18 ++++++++++---
 7 files changed, 180 insertions(+), 9 deletions(-)

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Comments

Stephen Boyd Dec. 20, 2024, 11:52 p.m. UTC | #1
Quoting Geert Uytterhoeven (2024-12-20 02:29:08)
>         Hi Mike, Stephen,
> 
> The following changes since commit 40384c840ea1944d7c5a392e8975ed088ecf0b37:
> 
>   Linux 6.13-rc1 (2024-12-01 14:28:56 -0800)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.14-tag1
> 
> for you to fetch changes up to f962745289958e89bf520407728e384e52ea8e27:
> 
>   clk: renesas: r9a08g045: Add clocks, resets and power domain support for the ADC IP (2024-12-10 12:02:24 +0100)
> 
> ----------------------------------------------------------------

Thanks. Pulled into clk-next