From patchwork Thu Dec 6 21:58:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 10716939 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4A8717DB for ; Thu, 6 Dec 2018 21:59:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9627C2EE7D for ; Thu, 6 Dec 2018 21:59:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8A7292EE81; Thu, 6 Dec 2018 21:59:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,TVD_SUBJ_WIPE_DEBT autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 360092EE7D for ; Thu, 6 Dec 2018 21:59:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726093AbeLFV7g (ORCPT ); Thu, 6 Dec 2018 16:59:36 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:55914 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726177AbeLFV7g (ORCPT ); Thu, 6 Dec 2018 16:59:36 -0500 Received: from penelope.horms.nl (unknown [64.124.208.80]) by kirsty.vergenet.net (Postfix) with ESMTPA id 4ECD625BF37; Fri, 7 Dec 2018 08:58:59 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1544133539; bh=MQ0/ZqPHciaw1YMwBMh3shQekS4AjSTuF2DrYQdibM4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kUPuCmFGyYGbCFFNJ4BPwGalr8zYqD+tBKlBtUSmoUJ0xqadDJwKH67un6+Hk5xsQ l15d8dIhq0KM1jUujZFMsxsSX/+Q9jiKAAcwUcHgsgBf/b4Zf2gtZweh1wdjufErls iIw3OiOiiFZBSrhv3kvSfC/x9jsz2yMYuwOMUuxE= Received: by penelope.horms.nl (Postfix, from userid 7100) id 1F60BE217D1; Thu, 6 Dec 2018 13:58:58 -0800 (PST) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Geert Uytterhoeven , Simon Horman Subject: [PATCH 2/9] soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain Date: Thu, 6 Dec 2018 13:58:50 -0800 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) removed the CR7 power domain on R-Car V3M, as this SoC does not have an ARM Cortex-R7 Realtime Core. As this definition was never used from DT, it can just be removed. Fixes: 833bdb47c826a1a6 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") Fixes: bab9b2a74fe9da96 ("soc: renesas: rcar-sysc: add R8A77970 support") Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- drivers/soc/renesas/r8a77970-sysc.c | 1 - include/dt-bindings/power/r8a77970-sysc.h | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/soc/renesas/r8a77970-sysc.c b/drivers/soc/renesas/r8a77970-sysc.c index 35b30d6a8958..2c6d76490ca0 100644 --- a/drivers/soc/renesas/r8a77970-sysc.c +++ b/drivers/soc/renesas/r8a77970-sysc.c @@ -20,7 +20,6 @@ static const struct rcar_sysc_area r8a77970_areas[] __initconst = { PD_CPU_NOCR }, { "ca53-cpu1", 0x200, 1, R8A77970_PD_CA53_CPU1, R8A77970_PD_CA53_SCU, PD_CPU_NOCR }, - { "cr7", 0x240, 0, R8A77970_PD_CR7, R8A77970_PD_ALWAYS_ON }, { "a3ir", 0x180, 0, R8A77970_PD_A3IR, R8A77970_PD_ALWAYS_ON }, { "a2ir0", 0x400, 0, R8A77970_PD_A2IR0, R8A77970_PD_A3IR }, { "a2ir1", 0x400, 1, R8A77970_PD_A2IR1, R8A77970_PD_A3IR }, diff --git a/include/dt-bindings/power/r8a77970-sysc.h b/include/dt-bindings/power/r8a77970-sysc.h index bf54779d1625..5c1ef1398b70 100644 --- a/include/dt-bindings/power/r8a77970-sysc.h +++ b/include/dt-bindings/power/r8a77970-sysc.h @@ -16,7 +16,6 @@ #define R8A77970_PD_CA53_CPU0 5 #define R8A77970_PD_CA53_CPU1 6 -#define R8A77970_PD_CR7 13 #define R8A77970_PD_CA53_SCU 21 #define R8A77970_PD_A2IR0 23 #define R8A77970_PD_A3IR 24