From patchwork Wed Feb 5 14:07:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13961137 X-Patchwork-Delegate: geert@linux-m68k.org Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [195.130.132.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE9A6F510 for ; Wed, 5 Feb 2025 14:07:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.132.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738764445; cv=none; b=MBfDPc0Mw3Sri0zwtbEs8LFvypDZQlsvP4bZPIcgXcM2CACssuEoP10ce0NMD4a+37nh4j6rCct4uGRcc87X4NhLHoOLhCPaKxHZRogkNmMuDw9MFCJEy9rrIgM0P3nR6v/vWLPxrtRmEEpIkPvFleBQ3EdD08rY9TnwlUdo57Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738764445; c=relaxed/simple; bh=AXzkEt26v0sftnDbLR8431kLT+0OCOMcnr/tn3NhncI=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=auNgdeOmwpWf/uV8lixN8T3DQnJ5Uf2mPb3nttf4Rv4sUkpio+1pIsnF6ybpFqjG0dwQa1hXDBoF6gU1/Pi4ikiJ4iuxR9rIB00viJGoqcGVI2VxObuzYyXqmHJU8+TjQTkT4Wg9xrQuz1v5cOsNE4/6wKFJ4sYss/Ih/YPk1BA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.132.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:fa11:c14e:2df5:5273]) by xavier.telenet-ops.be with cmsmtp id 9q7K2E00f3f221S01q7KkZ; Wed, 05 Feb 2025 15:07:20 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.97) (envelope-from ) id 1tfg3X-0000000FvyS-315G; Wed, 05 Feb 2025 15:07:19 +0100 Received: from geert by rox.of.borg with local (Exim 4.97) (envelope-from ) id 1tfg3j-00000006Vpg-3DNG; Wed, 05 Feb 2025 15:07:19 +0100 From: Geert Uytterhoeven To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Lad Prabhakar Cc: linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2] riscv: defconfig: Disable Renesas SoC support Date: Wed, 5 Feb 2025 15:07:17 +0100 Message-ID: X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Follow-up to commit e36ddf3226864e09 ("riscv: defconfig: Disable RZ/Five peripheral support") in v6.12-rc1: - Disable ARCH_RENESAS, too, as currently RZ/Five is the sole Renesas RISC-V SoC, - Drop no longer needed explicit disable of USB_XHCI_RCAR, which depends on ARCH_RENESAS. Signed-off-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar --- v2: - Add Reviewed-by. --- arch/riscv/configs/defconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 0f7dcbe3c45bb597..3c8e16d71e175e0e 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -26,7 +26,6 @@ CONFIG_EXPERT=y # CONFIG_SYSFS_SYSCALL is not set CONFIG_PROFILING=y CONFIG_ARCH_MICROCHIP=y -CONFIG_ARCH_RENESAS=y CONFIG_ARCH_SIFIVE=y CONFIG_ARCH_SOPHGO=y CONFIG_ARCH_SPACEMIT=y @@ -202,7 +201,6 @@ CONFIG_USB=y CONFIG_USB_OTG=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_PLATFORM=y -# CONFIG_USB_XHCI_RCAR is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_OHCI_HCD=y