From patchwork Thu Feb 25 23:53:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 8427971 Return-Path: X-Original-To: patchwork-linux-renesas-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A5CFE9FC33 for ; Thu, 25 Feb 2016 23:53:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 28E0020268 for ; Thu, 25 Feb 2016 23:53:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 88B2020266 for ; Thu, 25 Feb 2016 23:53:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752375AbcBYXxb (ORCPT ); Thu, 25 Feb 2016 18:53:31 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:42563 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752362AbcBYXxb (ORCPT ); Thu, 25 Feb 2016 18:53:31 -0500 Received: from penelope.kanocho.kobe.vergenet.net (aa046235.ppp.asahi-net.or.jp [110.5.46.235]) by kirsty.vergenet.net (Postfix) with ESMTPSA id 4301025BE9F; Fri, 26 Feb 2016 10:53:15 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1456444395; bh=45KuWh4OJ8uERJnPf15i6HVO/rBfyup80rUHgV6WMJQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aXazELYwRCpz1j6kfCymx16ckbYltd3Fh4gIO4JNY9iR8Abenc+pZybp/cz3ITtaJ KiOyF97iin3jY4ixfzThJPhhFKruLHCsgIH2WtHmk8nLt2t5gCz3xqXMnDKx9shItM lX0k2uem5Lm8ABeL+/HWbF9Q0zd9dso1w14B+jog= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id 500E260F1D; Fri, 26 Feb 2016 10:53:10 +1100 (AEDT) From: Simon Horman To: linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Geert Uytterhoeven , Simon Horman Subject: [PATCH 13/19] ARM: dts: r8a7793: Add L2 cache-controller node Date: Fri, 26 Feb 2016 08:53:02 +0900 Message-Id: X-Mailer: git-send-email 2.7.0.rc3.207.g0ac5344 In-Reply-To: References: Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven Add a device node for the L2 cache, and link the CPU node to it. The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as 64 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7793.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 9837f90f1718..b48215945241 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -51,6 +51,7 @@ < 937500 1000000>, < 750000 1000000>, < 375000 1000000>; + next-level-cache = <&L2_CA15>; }; }; @@ -73,6 +74,12 @@ }; }; + L2_CA15: cache-controller@0 { + compatible = "cache"; + cache-unified; + cache-level = <2>; + }; + gic: interrupt-controller@f1001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;