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Received: from CH2PR13MB3368.namprd13.prod.outlook.com (52.132.246.90) by CH2PR13MB3656.namprd13.prod.outlook.com (20.180.4.204) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2538.14; Tue, 10 Dec 2019 11:11:38 +0000 Received: from CH2PR13MB3368.namprd13.prod.outlook.com ([fe80::eccb:16ac:e897:85d5]) by CH2PR13MB3368.namprd13.prod.outlook.com ([fe80::eccb:16ac:e897:85d5%3]) with mapi id 15.20.2538.012; Tue, 10 Dec 2019 11:11:37 +0000 From: Yash Shah To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, mark.rutland@arm.com, palmer@dabbelt.com, paul.walmsley@sifive.com Subject: [PATCH v4 0/6] GPIO & Hierarchy IRQ support for HiFive Unleashed Date: Tue, 10 Dec 2019 16:41:08 +0530 Message-Id: <1575976274-13487-1-git-send-email-yash.shah@sifive.com> X-Mailer: git-send-email 2.7.4 X-ClientProxiedBy: PN1PR0101CA0028.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c00:c::14) To CH2PR13MB3368.namprd13.prod.outlook.com (2603:10b6:610:2c::26) MIME-Version: 1.0 Received: from dhananjayk-PowerEdge-R620.open-silicon.com (114.143.65.226) by PN1PR0101CA0028.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c00:c::14) with Microsoft SMTP Server (version=TLS1_2, cipher=) via Frontend Transport; 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The gpio patches are mostly based on Wesley's patch. The patchset also adds hierarchy irq domain support as it is required by this gpio driver. It also includes the irqdomain patch to introduce irq_domain_translate_onecell() and irq-nvic driver patch to use this newly introduced function. This patchset is based on Linux 5.4-rc6 and tested on HiFive Unleashed board Changes: v4 vs v3: - Rename the DT yaml document to more standard naming (sifive,gpio.yaml) - Drop "clock-names" property from yaml document - Add "minItems" to "interrupts" node in yaml v3 vs v2: - Include patch for irq-nvic driver to use irq_domain_translate_onecell - Remove unnecessary inclusion of header files - Use a single prefix for all symbols in this driver - Rename the "enabled" field of struct sifive_gpio to "irq_state" - Remove unused variables and locking from probe() - Other minor changes v2 vs v1: - Add patch to introduce irq_domain_translate_onecell() and use it in the sifive PLIC driver - Drop the usage of own locks, instead use internal bgpio_locks - Consistently use regmap for register access throughout the gpio code - Convert the GPIO DT documentation into a json schema - Other minor changes based upon feedback received on v1 v1 vs RFC: Incorporated below changes as suggested by Linus Walleij on RFC version of this patchset[0] - Dropped PWM patches as they are already merged. - Include "GPIO_GENERIC" and "REGMAP_MMIO" in Kconfig select option - Remove unwanted inclusion of header files - Use regmap MMIO instead of customised sifive_assign_bit() - Use GPIOLIB_GENERIC and bgpio_init() to set up the accessors - Use hierarchical irqdomain [0] https://lore.kernel.org/linux-riscv/20181010123519.RVexDppaPFpIWl7QU_hpP8tc5qqWPJgeuLYn0FaGbeQ@z/ Yash Shah (6): genirq: introduce irq_domain_translate_onecell irqchip: nvic: Use irq_domain_translate_onecell instead of custom func irqchip: sifive: Support hierarchy irq domain gpio: sifive: Add DT documentation for SiFive GPIO gpio: sifive: Add GPIO driver for SiFive SoCs riscv: dts: Add DT support for SiFive FU540 GPIO driver .../devicetree/bindings/gpio/sifive,gpio.yaml | 68 ++++++ arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 15 +- .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 4 + drivers/gpio/Kconfig | 9 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-sifive.c | 252 +++++++++++++++++++++ drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-nvic.c | 15 +- drivers/irqchip/irq-sifive-plic.c | 30 ++- include/linux/irqdomain.h | 5 + kernel/irq/irqdomain.c | 17 ++ 11 files changed, 399 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/sifive,gpio.yaml create mode 100644 drivers/gpio/gpio-sifive.c