From patchwork Thu Dec 17 16:01:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 11980149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68A32C4361B for ; Thu, 17 Dec 2020 16:03:06 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1C3BE23998 for ; Thu, 17 Dec 2020 16:03:05 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1C3BE23998 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=Zq6PXbreOvWQJTi6308lVahuAMhmGcfDcdH+EkwkHXc=; b=nuSYWd8CPaL5IRcDvXhszxLbKB dZDoLPya15178Egk7Tsbhtv8d5+4PtFZS3koVIHCZ3q22UMbz3CplqGIArnliZNi5AHFt0at6fY3+ mBjoBY6O6+2m7fMf/Td8j/WuSVjPaN6ZxiK6s+GwjGm4F1U7J1J7lCsyTQfIZCW6yzpQpPwbAuzzH YObHAGyN9gZNgBX4cZSo5jhO5+916MympNETYmlNrPNEBmOf1FHh1McAr6LZjFtikNqoBCi6CzuTH Z2NeNxhYZDuvB9xK5BxuLhgS1l+wqj3Ygb72QiGCJDSs40r97SI8rU8X4kTVRVABzmx/zv3n6haQn OsGz15Sw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpvk2-000830-8c; Thu, 17 Dec 2020 16:02:58 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpvk0-00082R-EI for linux-riscv@lists.infradead.org; Thu, 17 Dec 2020 16:02:57 +0000 From: guoren@kernel.org Authentication-Results: mail.kernel.org; dkim=permerror (bad message/signature format) To: palmerdabbelt@google.com, paul.walmsley@sifive.com, mhiramat@kernel.org, alankao@andestech.com, rostedt@goodmis.org, bjorn.topel@intel.com, pdp7pdp7@gmail.com Subject: [PATCH v5 0/9] Add k/uprobe & fentry & error_injection supported Date: Thu, 17 Dec 2020 16:01:36 +0000 Message-Id: <1608220905-1962-1-git-send-email-guoren@kernel.org> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_110256_617506_22B42893 X-CRM114-Status: GOOD ( 14.89 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: me@packi.ch, Guo Ren , anup@brainfault.org, linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, guoren@kernel.org, zong.li@sifive.com, greentime.hu@sifive.com, linux-riscv@lists.infradead.org Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Guo Ren This the 5th round of riscv k/uprobe support patchset, it's based on linux-5.10 and you can test it with the repo: https://github.com/c-sky/csky-linux/tree/linux-5.10-probe-dev The important fixup is about the trampoline call site, we change the prologue of the function call site from: : nop -> addi sp, sp, -SZREG nop -> REG_S ra, (sp) nop -> auipc ra, 0x? nop -> jalr ?(ra) nop -> REG_L ra, (sp) nop -> addi sp, sp, -SZREG ... to: : nop -> REG_S ra, -SZREG(sp) nop -> auipc ra, 0x? nop -> jalr ?(ra) nop -> REG_L ra, -SZREG(sp) ... It's wrong to change the sp in callsite, because when you change the value of ra then the sp is broken and the same with HAVE_OPTPROBES. The patchset includes kprobe/uprobe support and some related fixups. Patrick provides HAVE_REGS_AND_STACK_ACCESS_API support and some kprobe's code. The framework of k/uprobe is from csky but also refers to other arches'. kprobes on ftrace is also supported in the patchset. Modify dynamic ftrace mechanism from mcount to fentry. There is no single step exception in riscv ISA, only single-step facility for jtag. See riscv-Privileged spec: Interrupt Exception Code-Description 1 0 Reserved 1 1 Supervisor software interrupt 1 2–4 Reserved 1 5 Supervisor timer interrupt 1 6–8 Reserved 1 9 Supervisor external interrupt 1 10–15 Reserved 1 ≥16 Available for platform use 0 0 Instruction address misaligned 0 1 Instruction access fault 0 2 Illegal instruction 0 3 Breakpoint 0 4 Load address misaligned 0 5 Load access fault 0 6 Store/AMO address misaligned 0 7 Store/AMO access fault 0 8 Environment call from U-mode 0 9 Environment call from S-mode 0 10–11 Reserved 0 12 Instruction page fault 0 13 Load page fault 0 14 Reserved 0 15 Store/AMO page fault 0 16–23 Reserved 0 24–31 Available for custom use 0 32–47 Reserved 0 48–63 Available for custom use 0 ≥64 Reserved No single step! Other arches use hardware single-step exception for k/uprobe, eg: - powerpc: regs->msr |= MSR_SINGLESTEP - arm/arm64: PSTATE.D for enabling software step exceptions - s390: Set PER control regs, turns on single step for the given address - x86: regs->flags |= X86_EFLAGS_TF - csky: of course use hw single step :) All the above arches use a hardware single-step exception mechanism to execute the instruction that was replaced with a probe breakpoint. So utilize ebreak to simulate. Some pc related instructions couldn't be executed out of line and some system/fence instructions couldn't be a trace site at all. So we give out a reject list and simulate list in decode-insn.c. You could use uprobe to test simulate code like this: echo 'p:enter_current_state_one /hello:0x6e4 a0=%a0 a1=%a1' >> /sys/kernel/debug/tracing/uprobe_events echo 1 > /sys/kernel/debug/tracing/events/uprobes/enable /hello ^C cat /sys/kernel/debug/tracing/trace tracer: nop entries-in-buffer/entries-written: 1/1 #P:1 _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / delay TASK-PID CPU# |||| TIMESTAMP FUNCTION | | | |||| | | hello-94 [000] d... 55.404242: enter_current_state_one: (0x106e4) a0=0x1 a1=0x3fffa8ada8 Be care /hello:0x6e4 is the file offset in elf and it relate to 0x106e4 in memory and hello is your target elf program. Try kprobe like this: echo 'p:myprobe sys_clone a0=%a0 a1=%a1 a2=%a2 a3=%a3 stach_val=+4($stack)' > /sys/kernel/debug/tracing/kprobe_events echo 'r:myretprobe sys_clone $retval' >> /sys/kernel/debug/tracing/kprobe_events echo 1 > /sys/kernel/debug/tracing/events/kprobes/enable cat /sys/kernel/debug/tracing/trace tracer: nop entries-in-buffer/entries-written: 2/2 #P:1 _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / delay TASK-PID CPU# |||| TIMESTAMP FUNCTION | | | |||| | | sh-92 [000] .n.. 8506.435857: myprobe: (sys_clone+0x0/0x28) a0=0x1200011 a1=0x0 a2=0x0 a3=0x0 stach_val=0x2044ecffffffe0 sh-92 [000] d... 8506.445620: myretprobe: (ret_from_syscall+0x0/0x2 <- sys_clone) arg1=0x64 Changlog v5: - Fixup fentry modified sp cause fail_inject error - Fixup function_graph broken - Update to linux-5.10 - Fixup checkpatch.pl issues Changlog v4: - Revert fixup kprobes handler couldn't change pc - Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT - rebase on linux-tree: commit 071a0578b0ce0b0e543d1e38ee6926b9cc21c198 Merge: fad7011 be4df0c Author: Linus Torvalds Date: Fri Oct 16 15:29:46 2020 -0700 Merge tag 'ovl-update-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs Changlog v3: - Add upport for function error injection - Fixup kprobes handler couldn't change pc Changlog v2: - Add Reviewed-by, Tested-by, Acked-by, thx for all of you - Add kprobes on ftrace feature - Use __always_inline as same as fix_to_virt for fixup BUILD_BUG_ON - Use const "const unsigned int" for 2th param for fixup BUILD_BUG_ON Guo Ren (8): riscv: Fixup compile error BUILD_BUG_ON failed riscv: Fixup wrong ftrace remove cflag riscv: Fixup patch_text panic in ftrace riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT riscv: Add kprobes supported riscv: Add KPROBES_ON_FTRACE supported riscv: Add uprobes supported riscv: Add support for function error injection Patrick Stählin (1): RISC-V: Implement ptrace regs and stack API arch/riscv/Kconfig | 8 + arch/riscv/Makefile | 2 + arch/riscv/include/asm/kprobes.h | 40 +++ arch/riscv/include/asm/probes.h | 24 ++ arch/riscv/include/asm/processor.h | 1 + arch/riscv/include/asm/ptrace.h | 35 +++ arch/riscv/include/asm/thread_info.h | 4 +- arch/riscv/include/asm/uprobes.h | 40 +++ arch/riscv/kernel/Makefile | 6 +- arch/riscv/kernel/ftrace.c | 95 +++--- arch/riscv/kernel/mcount-dyn.S | 342 ++++++++++------------ arch/riscv/kernel/patch.c | 8 +- arch/riscv/kernel/probes/Makefile | 6 + arch/riscv/kernel/probes/decode-insn.c | 48 ++++ arch/riscv/kernel/probes/decode-insn.h | 18 ++ arch/riscv/kernel/probes/ftrace.c | 53 ++++ arch/riscv/kernel/probes/kprobes.c | 398 ++++++++++++++++++++++++++ arch/riscv/kernel/probes/kprobes_trampoline.S | 93 ++++++ arch/riscv/kernel/probes/simulate-insn.c | 85 ++++++ arch/riscv/kernel/probes/simulate-insn.h | 47 +++ arch/riscv/kernel/probes/uprobes.c | 186 ++++++++++++ arch/riscv/kernel/ptrace.c | 99 +++++++ arch/riscv/kernel/signal.c | 3 + arch/riscv/kernel/traps.c | 19 ++ arch/riscv/lib/Makefile | 2 + arch/riscv/lib/error-inject.c | 10 + arch/riscv/mm/Makefile | 3 +- arch/riscv/mm/fault.c | 10 + 28 files changed, 1444 insertions(+), 241 deletions(-) create mode 100644 arch/riscv/include/asm/probes.h create mode 100644 arch/riscv/include/asm/uprobes.h create mode 100644 arch/riscv/kernel/probes/Makefile create mode 100644 arch/riscv/kernel/probes/decode-insn.c create mode 100644 arch/riscv/kernel/probes/decode-insn.h create mode 100644 arch/riscv/kernel/probes/ftrace.c create mode 100644 arch/riscv/kernel/probes/kprobes.c create mode 100644 arch/riscv/kernel/probes/kprobes_trampoline.S create mode 100644 arch/riscv/kernel/probes/simulate-insn.c create mode 100644 arch/riscv/kernel/probes/simulate-insn.h create mode 100644 arch/riscv/kernel/probes/uprobes.c create mode 100644 arch/riscv/lib/error-inject.c