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([51.37.234.167]) by smtp.gmail.com with ESMTPSA id m14-20020adfdc4e000000b0021a3c960214sm9189510wrj.6.2022.06.19.09.50.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jun 2022 09:50:16 -0700 (PDT) From: Conor Dooley To: Michael Turquette , Stephen Boyd , Conor Dooley , Philipp Zabel , Geert Uytterhoeven Cc: Daire McNamara , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [RFC 0/6] PolarFire SoC Reset controller Date: Sun, 19 Jun 2022 17:49:30 +0100 Message-Id: <20220619164935.1492823-1-mail@conchuod.ie> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220619_095020_676317_3A72FC69 X-CRM114-Status: GOOD ( 12.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley Hi Stephen (& Philipp), I gave the aux bus approach to the clock->reset driver combo a go. Could you take a quick look and lmk if it meets your expectations for that approach? There weren't too many aux bus drivers to "take inspiration from" so I implemented this based on drivers/peci/cpu.c If it all looks sane at first glance, I'll tidy things up a little and submit. @Geert the prior "RFC" you said you saw issues with the ethernet? I implemented the reset stuff for the macs and it looks to be to be working fine - but I did not do any meaninful testing with CONFIG_PM=y. Thanks, Conor. (Since it's just the clk -> reset aux bus interface I care about here, I left the net/dt maintainers off the CC.)* Conor Dooley (6): dt-bindings: clk: microchip: mpfs: add reset controller support dt-bindings: net: cdns,macb: document polarfire soc's macb clk: microchip: mpfs: add reset controller reset: add polarfire soc reset support net: macb: add polarfire soc reset support riscv: dts: microchip: add mpfs specific macb reset support .../bindings/clock/microchip,mpfs.yaml | 17 +- .../devicetree/bindings/net/cdns,macb.yaml | 1 + arch/riscv/boot/dts/microchip/mpfs.dtsi | 7 +- drivers/clk/microchip/Kconfig | 1 + drivers/clk/microchip/clk-mpfs.c | 118 +++++++++++-- drivers/net/ethernet/cadence/macb_main.c | 25 ++- drivers/reset/Kconfig | 9 + drivers/reset/Makefile | 2 +- drivers/reset/reset-mpfs.c | 155 ++++++++++++++++++ include/soc/microchip/mpfs.h | 8 + 10 files changed, 320 insertions(+), 23 deletions(-) create mode 100644 drivers/reset/reset-mpfs.c base-commit: b13baccc3850ca8b8cccbf8ed9912dbaa0fdf7f3