Message ID | 20230606105656.124355-1-mason.huo@starfivetech.com (mailing list archive) |
---|---|
Headers | show |
Series | Add JH7110 cpufreq support | expand |
Hello, AXP15060 series just got merged, just to remind this for anyone who wants to test this series. Best regards, Shengyu > The StarFive JH7110 SoC has four RISC-V cores, > and it supports up to 4 cpu frequency loads. > > This patchset adds the compatible strings into the allowlist > for supporting the generic cpufreq driver on JH7110 SoC. > Also, it enables the axp15060 pmic for the cpu power source. > > The series has been tested on the VisionFive 2 boards which > are equipped with JH7110 SoC and axp15060 pmic. > > --- > This patchset is based on v6.4-rc4 with these patches applied: > [1] ("regulator: Add X-Powers AXP15060/AXP313a PMIC support") > https://lore.kernel.org/lkml/20230524000012.15028-1-andre.przywara@arm.com/ > > Changes since v3: > - Fix the dtb_check issues for axp15060 pmic dts configuration. > > Changes since v2: > - Fix the new blank line at EOF issue in dtsi. > > Changes since v1: > - Fix dts node naming issues. > - Move clock properties of cpu node from <board>.dtsi to <soc>.dtsi. > - Follow the alphabetical order to place the cpufreq dt allowlist. > > Mason Huo (3): > riscv: dts: starfive: Enable axp15060 pmic for cpufreq > cpufreq: dt-platdev: Add JH7110 SOC to the allowlist > riscv: dts: starfive: Add cpu scaling for JH7110 SoC > > .../jh7110-starfive-visionfive-2.dtsi | 33 +++++++++++++++++++ > arch/riscv/boot/dts/starfive/jh7110.dtsi | 33 +++++++++++++++++++ > drivers/cpufreq/cpufreq-dt-platdev.c | 2 ++ > 3 files changed, 68 insertions(+) >