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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Lad Prabhakar Hi Geert, This patch series intends to incorporate the absent port pins P19 to P28, which are exclusively available on the RZ/Five SoC. I am submitting this series as an RFC (Request for Comments) as the port pins P19 to P28 cannot be utilized as GPIO but can be utilized as multiplexed pins. Additionally, certain attributes such as setting the ISEL would necessitate a device tree property to indicate ISEL. Therefore, before proceeding with the addition of comprehensive support, I would appreciate some input on whether an alternative approach could be considered. Cheers, Prabhakar Lad Prabhakar (4): pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro pinctrl: renesas: pinctrl-rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 riscv: dts: renesas: r9a07g043f: Update gpio-ranges property arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 4 + drivers/pinctrl/renesas/pinctrl-rzg2l.c | 263 +++++++++++++------- 2 files changed, 176 insertions(+), 91 deletions(-)