| Message ID | 20230929000704.53217-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Enable peripherals on RZ/Five SMARC EVK | expand |
Hello: This series was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Fri, 29 Sep 2023 01:06:59 +0100 you wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Hi All, > > This patch series does the following: > * Adds L2 cache node and marks the SoC as noncoherent > * Enables IP blocks which were explicitly disabled and for > which support is present > * Enables the configs required for RZ/Five SoC > > [...] Here is the summary with links: - [1/5] riscv: dts: renesas: r9a07g043f: Add L2 cache node (no matching commit) - [2/5] riscv: dts: renesas: r9a07g043f: Add dma-noncoherent property (no matching commit) - [3/5] riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled (no matching commit) - [4/5] riscv: dts: renesas: rzfive-smarc: Drop dma properties from SSI1 node (no matching commit) - [5/5] riscv: configs: defconfig: Enable configs required for RZ/Five SoC https://git.kernel.org/riscv/c/db38228c03d6 You are awesome, thank you!
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Hi All, This patch series does the following: * Adds L2 cache node and marks the SoC as noncoherent * Enables IP blocks which were explicitly disabled and for which support is present * Enables the configs required for RZ/Five SoC Cheers, Prabhakar Lad Prabhakar (5): riscv: dts: renesas: r9a07g043f: Add L2 cache node riscv: dts: renesas: r9a07g043f: Add dma-noncoherent property riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled riscv: dts: renesas: rzfive-smarc: Drop dma properties from SSI1 node riscv: configs: defconfig: Enable configs required for RZ/Five SoC arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 13 +++++ .../boot/dts/renesas/rzfive-smarc-som.dtsi | 23 -------- arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 55 +------------------ arch/riscv/configs/defconfig | 52 ++++++++++++++++++ 4 files changed, 67 insertions(+), 76 deletions(-)