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Thu, 30 Nov 2023 23:21:41 -0800 (PST) Received: from charlie.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id v23-20020a0568301bd700b006d7f8da1b57sm412662ota.62.2023.11.30.23.21.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 23:21:41 -0800 (PST) From: Charlie Jenkins Subject: [PATCH v2 0/2] riscv: Create and document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl Date: Thu, 30 Nov 2023 23:21:34 -0800 Message-Id: <20231130-fencei-v2-0-2cb623ab1b1f@rivosinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAH6JaWUC/zXMQQrCMBCF4auUWRvJjGKrq95DuminEzsLE0kkK CV3NxZd/o/Ht0KSqJLg0qwQJWvS4GvQrgFeRn8To3NtIEsHRGyNE8+ixp3dyc5td3SjhXp+RHH 62qDrUHvR9AzxvbkZv+uPIPoTGY01k7DtEHkipD5qDkk97zncYSilfACkqQconwAAAA== To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Jonathan Corbet , Conor Dooley Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Improve the performance of icache flushing by creating a new prctl flag PR_RISCV_SET_ICACHE_FLUSH_CTX. The interface is left generic to allow for future expansions such as with the proposed J extension [1]. Documentation is also provided to explain the use case. [1] https://github.com/riscv/riscv-j-extension Signed-off-by: Charlie Jenkins --- Changes in v2: - Fix kernel-doc comment (Conor) - Link to v1: https://lore.kernel.org/r/20231122-fencei-v1-0-bec0811cb212@rivosinc.com --- Charlie Jenkins (2): riscv: Include riscv_set_icache_flush_ctx prctl documentation: Document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl Documentation/arch/riscv/cmodx.rst | 98 ++++++++++++++++++++++++++++++++++++++ Documentation/arch/riscv/index.rst | 1 + arch/riscv/include/asm/mmu.h | 2 + arch/riscv/include/asm/processor.h | 6 +++ arch/riscv/mm/cacheflush.c | 37 ++++++++++++++ arch/riscv/mm/context.c | 8 ++-- include/uapi/linux/prctl.h | 3 ++ kernel/sys.c | 6 +++ 8 files changed, 158 insertions(+), 3 deletions(-) --- base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86 change-id: 20231117-fencei-f9f60d784fa0