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Mon, 08 Jan 2024 10:42:39 -0800 (PST) Received: from charlie.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id pp24-20020a0568709d1800b002044a0677adsm97860oab.8.2024.01.08.10.42.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 10:42:38 -0800 (PST) From: Charlie Jenkins Subject: [PATCH v5 0/2] riscv: Create and document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl Date: Mon, 08 Jan 2024 10:42:28 -0800 Message-Id: <20240108-fencei-v5-0-aa1e51d7222f@rivosinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIABRCnGUC/23PTW7DIBCG4atErEs1M+CfdNV7RFkYPCSzqB1Bh RpZvntw1DhR5OWHeF7EpBJH4aS+dpOKnCXJOJRRfeyUP3fDibX0ZSsCMojY6MCDZ9FhH2rom9a GDlS5fIkc5O8eOhzLPkv6HeP13s24nP4niB6JjBq0Yw8toneE9B0lj0kG/+nHH7VUMr1IA6ukI sm7mkzn0GHYkOYpCc0qzfJmU2HVkmnZNRvSPqQFhPXD2RbZWx8ouD1UvXmT8zzfAOamo+VNAQA A To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Jonathan Corbet , Conor Dooley , =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , Randy Dunlap Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Improve the performance of icache flushing by creating a new prctl flag PR_RISCV_SET_ICACHE_FLUSH_CTX. The interface is left generic to allow for future expansions such as with the proposed J extension [1]. Documentation is also provided to explain the use case. [1] https://github.com/riscv/riscv-j-extension Signed-off-by: Charlie Jenkins --- Changes in v5: - Minor documentation changes (Randy) - Link to v4: https://lore.kernel.org/r/20240107-fencei-v4-0-d4cf2fb905d3@rivosinc.com Changes in v4: - Add OFF flag to disallow fence.i in userspace (Atish) - Fix documentation issues (Atish) - Link to v3: https://lore.kernel.org/r/20231213-fencei-v3-0-b75158238eb7@rivosinc.com Changes in v3: - Check if value force_icache_flush set on thread, rather than in mm twice (Clément) - Link to v2: https://lore.kernel.org/r/20231130-fencei-v2-0-2cb623ab1b1f@rivosinc.com Changes in v2: - Fix kernel-doc comment (Conor) - Link to v1: https://lore.kernel.org/r/20231122-fencei-v1-0-bec0811cb212@rivosinc.com --- Charlie Jenkins (2): riscv: Include riscv_set_icache_flush_ctx prctl documentation: Document PR_RISCV_SET_ICACHE_FLUSH_CTX prctl Documentation/arch/riscv/cmodx.rst | 88 ++++++++++++++++++++++++++++++++++++++ Documentation/arch/riscv/index.rst | 1 + arch/riscv/include/asm/mmu.h | 2 + arch/riscv/include/asm/processor.h | 6 +++ arch/riscv/mm/cacheflush.c | 56 ++++++++++++++++++++++++ arch/riscv/mm/context.c | 8 ++-- include/uapi/linux/prctl.h | 4 ++ kernel/sys.c | 6 +++ 8 files changed, 168 insertions(+), 3 deletions(-) --- base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86 change-id: 20231117-fencei-f9f60d784fa0