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([2a01:e0a:999:a3a0:2fec:d20:2b60:e334]) by smtp.gmail.com with ESMTPSA id l23-20020a05600c1d1700b00418f99170f2sm39646638wms.32.2024.04.29.08.06.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Apr 2024 08:06:29 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 00/11] Add support for a few Zc* extensions as well as Zcmop Date: Mon, 29 Apr 2024 17:04:53 +0200 Message-ID: <20240429150553.625165-1-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240429_080632_686224_1C033105 X-CRM114-Status: UNSURE ( 9.45 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add support for (yet again) more RVA23U64 missing extensions. Add support for Zcmop, Zca, Zcf, Zcd and Zcb extensions isa string parsing, hwprobe and kvm support. Zce, Zcmt and Zcmp extensions have been left out since they target microcontrollers/embedded CPUs and are not needed by RVA23U64. Since Zc* extensions states that C implies Zca, Zcf (if F and RV32), Zcd (if D), this series modifies the way ISA string is parsed and now does it in two phases. First one parses the string and the second one validates it for the final ISA description. This series is based on the Zimop one [1]. An additional fix [2] should be applied to correctly test that series. Link: https://lore.kernel.org/linux-riscv/20240404103254.1752834-1-cleger@rivosinc.com/ [1] Link: https://lore.kernel.org/all/20240409143839.558784-1-cleger@rivosinc.com/ [2] --- v4: - Modify validate() callbacks to return an 0, -EPROBEDEFER or another error. - v3: https://lore.kernel.org/all/20240423124326.2532796-1-cleger@rivosinc.com/ v3: - Fix typo "exists" -> "exist" - Remove C implies Zca, Zcd, Zcf, dt-bindings rules - Rework ISA string resolver to handle dependencies - v2: https://lore.kernel.org/all/20240418124300.1387978-1-cleger@rivosinc.com/ v2: - Add Zc* dependencies validation in dt-bindings - v1: https://lore.kernel.org/lkml/20240410091106.749233-1-cleger@rivosinc.com/ Clément Léger (11): dt-bindings: riscv: add Zca, Zcf, Zcd and Zcb ISA extension description riscv: add ISA extensions validation riscv: add ISA parsing for Zca, Zcf, Zcd and Zcb riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensions RISC-V: KVM: Allow Zca, Zcf, Zcd and Zcb extensions for Guest/VM KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test dt-bindings: riscv: add Zcmop ISA extension description riscv: add ISA extension parsing for Zcmop riscv: hwprobe: export Zcmop ISA extension RISC-V: KVM: Allow Zcmop extension for Guest/VM KVM: riscv: selftests: Add Zcmop extension to get-reg-list test Documentation/arch/riscv/hwprobe.rst | 24 ++ .../devicetree/bindings/riscv/extensions.yaml | 90 ++++++ arch/riscv/include/asm/cpufeature.h | 1 + arch/riscv/include/asm/hwcap.h | 5 + arch/riscv/include/uapi/asm/hwprobe.h | 5 + arch/riscv/include/uapi/asm/kvm.h | 5 + arch/riscv/kernel/cpufeature.c | 259 ++++++++++++------ arch/riscv/kernel/sys_hwprobe.c | 5 + arch/riscv/kvm/vcpu_onereg.c | 10 + .../selftests/kvm/riscv/get-reg-list.c | 20 ++ 10 files changed, 337 insertions(+), 87 deletions(-)