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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-705cc78a1a0sm730028b3a.0.2024.06.13.00.32.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Jun 2024 00:32:39 -0700 (PDT) From: Andy Chiu Subject: [PATCH 0/8] riscv: ftrace: atmoic patching and preempt improvements Date: Thu, 13 Jun 2024 15:11:05 +0800 Message-Id: <20240613-dev-andyc-dyn-ftrace-v4-v1-0-1a538e12c01e@sifive.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAImbamYC/x3MMQqAMAxA0atIZgOtFkGvIg6hiZqlSitFkd7d4 viG/19IElUSTM0LUbImPUKFbRvwO4VNULkaOtM5M9geWTJS4McjPwHXK5IXzA5HZ9mRMUJ2hFq fUVa9//O8lPIBP9tutWkAAAA= To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Zong Li , Steven Rostedt , Masami Hiramatsu , Mark Rutland , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Puranjay Mohan Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org, llvm@lists.linux.dev, Andy Chiu , Evgenii Shatokhin X-Mailer: b4 0.12.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240613_003243_778973_8A782C0A X-CRM114-Status: GOOD ( 13.63 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This series makes atmoic code patching possible in riscv ftrace. A direct benefit of this is that we can get rid of stop_machine() when patching function entries. This also makes it possible to run ftrace with full kernel preemption. Before this series, the kernel initializes patchable function entries to NOP4 + NOP4. To start tracing, it updates entries to AUIPC + JALR while holding other cores in stop_machine. stop_machine() is required because it is impossible to update 2 instructions, and be seen atomically. And preemption must have to be prevented, as kernel preemption allows process to be scheduled out while executing on one of these instruction pairs. This series addresses the problem by initializing the first NOP4 to AUIPC. So, atmoic patching is possible because the kernel only has to update one instruction. As long as the instruction is naturally aligned, then it is expected to be updated atomically. However, the address range of the ftrace trampoline is limited to +-2K from ftrace_caller after appplying this series. This issue is expected to be solved by Puranjay's CALL_OPS, where it adds 8B naturally align data in front of pacthable functions and can use it to direct execution out to any custom trampolines. The series is composed by two parts. The first part (1-3) cleans up existing issues that was found during testing of and not caused by the implementation. The second part modifies the ftrace code patching mechanism (4-6) as mentioned above. Then prepare ftrace to be able to run with kernel preemption (7,8) --- Andy Chiu (8): riscv: stacktrace: convert arch_stack_walk() to noinstr tracing: do not trace kernel_text_address() riscv: ftrace: support fastcc in Clang for WITH_ARGS riscv: ftrace: align patchable functions to 4 Byte boundary riscv: ftrace: prepare ftrace for atomic code patching riscv: ftrace: do not use stop_machine to update code riscv: vector: Support calling schedule() for preemptible Vector riscv: ftrace: support PREEMPT arch/riscv/Kconfig | 3 +- arch/riscv/Makefile | 7 +- arch/riscv/include/asm/ftrace.h | 11 +++ arch/riscv/include/asm/processor.h | 5 ++ arch/riscv/include/asm/vector.h | 22 +++++- arch/riscv/kernel/asm-offsets.c | 7 ++ arch/riscv/kernel/ftrace.c | 133 ++++++++++++++++--------------------- arch/riscv/kernel/mcount-dyn.S | 25 +++++-- arch/riscv/kernel/stacktrace.c | 2 +- kernel/extable.c | 4 +- 10 files changed, 129 insertions(+), 90 deletions(-) --- base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 change-id: 20240613-dev-andyc-dyn-ftrace-v4-941d4a00ea19 Best regards,