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Date: Sat, 13 Jul 2024 15:35:09 -0700 Message-Id: <20240713-thead-dwmac-v1-0-81f04480cd31@tenstorrent.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAB4Bk2YC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIxMDc0Mj3ZKM1MQU3ZTy3MRkXcMUE5NkE3OjpKQUUyWgjoKi1LTMCrBp0Up Bbs4gsbzUEt281IoSpdjaWgC5/rGAbgAAAA== To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Jisheng Zhang , Maxime Coquelin , Emil Renner Berthing , Drew Fustini , Guo Ren , Fu Wei , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720910119; l=2542; i=dfustini@tenstorrent.com; s=20230430; h=from:subject:message-id; bh=w/NbNx0hQrYCCt4fhGgjxPcsuaVQDgpxDwOcni8EUgY=; b=zhSGOkCGTA785OB0MaNJWsmX/0kLmkWTEMMzX8DoIdS3pa54QR5Rc1GW96RessAlJhjWKCsbm OZwPPbSVHNBARLIGPxYzRew0qKbsZpMAUxb9mzEk1yLH2//jZDwblTr X-Developer-Key: i=dfustini@tenstorrent.com; a=ed25519; pk=p3GKE9XFmjhwAayAHG4U108yag7V8xQVd4zJLdW0g7g= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240713_153522_905404_2F7342A8 X-CRM114-Status: GOOD ( 13.11 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org I am marking this as an RFC since it has been almost a year since the previous series and Jisheng has handed it off to me. There was discussion about the syscon for the APB registers in Jisheng's v2. I've gone a different route and switched to adding a second memory region to the gmac node: dwmac: DesignWare GMAC IP core registers apb: GMAC APB registers This patch depends my clock controller series: [PATCH v3 0/7] clk: thead: Add support for TH1520 AP_SUBSYS clock controller https://lore.kernel.org/linux-riscv/20240711-th1520-clk-v3-0-6ff17bb318fb@tenstorrent.com/ and the pinctrl series from Emil: [PATCH v2 0/8] Add T-Head TH1520 SoC pin control https://lore.kernel.org/linux-riscv/20240103132852.298964-1-emil.renner.berthing@canonical.com I have a branch with this series and the dependencies on top of 6.10-rc7: https://github.com/pdp7/linux/tree/b4/thead-dwmac Changes since Jisheng v2: - remove thead,gmacapb that references syscon for APB registers - add a second memory region to gmac nodes for the APB registers - Link: https://lore.kernel.org/all/20230827091710.1483-1-jszhang@kernel.org/ Changes since Jisheng v1: - rebase on the lastest net-next - collect Reviewed-by tag - address Krzysztof's comment of the dt binding - fix "div is not initialised" issue pointed out by Simon - Link: https://lore.kernel.org/all/20230820120213.2054-1-jszhang@kernel.org/ --- Emil Renner Berthing (1): riscv: dts: thead: Add TH1520 ethernet nodes Jisheng Zhang (3): dt-bindings: net: snps,dwmac: allow dwmac-3.70a to set pbl properties dt-bindings: net: add T-HEAD dwmac support net: stmmac: add glue layer for T-HEAD TH1520 SoC .../devicetree/bindings/net/snps,dwmac.yaml | 2 + .../devicetree/bindings/net/thead,dwmac.yaml | 81 ++++++ MAINTAINERS | 2 + arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 89 ++++++ .../boot/dts/thead/th1520-lichee-module-4a.dtsi | 131 +++++++++ arch/riscv/boot/dts/thead/th1520.dtsi | 55 +++- drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c | 300 +++++++++++++++++++++ 9 files changed, 670 insertions(+), 2 deletions(-) --- base-commit: 568c4e4b646777f3373f383cc38864a3cd91bbb7 change-id: 20240712-thead-dwmac-1d44c472bbd5 Best regards,