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Mon, 9 Oct 2023 11:25:15 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::d050:882f:a8a7:8263%5]) with mapi id 15.20.6838.040; Mon, 9 Oct 2023 11:25:15 +0000 From: Inochi Amaoto To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Chao Wei , Chen Wang , Albert Ou , Daniel Lezcano , Anup Patel Cc: Jisheng Zhang , Inochi Amaoto , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v2 0/7] Add Huashan Pi board support Date: Mon, 9 Oct 2023 19:25:14 +0800 Message-ID: X-Mailer: git-send-email 2.42.0 X-TMN: [8OJtKQ58U+IXxkwbUg2cUqt4spXaCenyyGuySXKtNhs=] X-ClientProxiedBy: SJ0PR13CA0153.namprd13.prod.outlook.com (2603:10b6:a03:2c7::8) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20231009112517.477055-1-inochiama@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|PH0PR20MB6129:EE_ X-MS-Office365-Filtering-Correlation-Id: 5c499fb9-9a13-4916-28b4-08dbc8ba6865 X-Microsoft-Antispam: BCL:0; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Huashan Pi board is an embedded development platform based on the CV1812H chip. Add minimal device tree files for this board. Currently, it can boot to a basic shell. NOTE: this series is based on the Jisheng's Milk-V Duo patch. Link: https://en.sophgo.com/product/introduce/huashan.html Link: https://en.sophgo.com/product/introduce/cv181xH.html Changed from v1: 1. split the patch into several patch and refactor them. Inochi Amaoto (7): dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic dt-bindings: timer: Add SOPHGO CV1812H clint dt-bindings: riscv: Add SOPHGO Huashan Pi board compatibles riscv: dts: sophgo: Separate common devices from cv1800b soc riscv: dts: sophgo: cv180x: Add gpio devices riscv: dts: sophgo: add initial CV1812H SoC device tree riscv: dts: sophgo: add Huashan Pi board device tree .../sifive,plic-1.0.0.yaml | 1 + .../devicetree/bindings/riscv/sophgo.yaml | 4 + .../bindings/timer/sifive,clint.yaml | 1 + arch/riscv/boot/dts/sophgo/Makefile | 1 + arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 95 +------------------ .../dts/sophgo/{cv1800b.dtsi => cv180x.dtsi} | 91 ++++++++++++++---- .../boot/dts/sophgo/cv1812h-huashan-pi.dts | 48 ++++++++++ arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 36 +++++++ 8 files changed, 165 insertions(+), 112 deletions(-) copy arch/riscv/boot/dts/sophgo/{cv1800b.dtsi => cv180x.dtsi} (58%) create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h-huashan-pi.dts create mode 100644 arch/riscv/boot/dts/sophgo/cv1812h.dtsi Reviewed-by: Jisheng Zhang --- 2.42.0