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[106.72.41.33]) by smtp.gmail.com with ESMTPSA id x3sm10046513pjq.6.2021.07.19.05.51.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Jul 2021 05:51:48 -0700 (PDT) To: Palmer Dabbelt , Guenter Roeck , Geert Uytterhoeven , Qiu Wenbo , Paul Walmsley , Albert Ou , Akira Tsukamoto , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org From: Akira Tsukamoto Subject: [PATCH v4 0/1] riscv: improving uaccess with logs from network bench Message-ID: Date: Mon, 19 Jul 2021 21:51:44 +0900 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.12.0 MIME-Version: 1.0 Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210719_055150_506864_2C0C40C9 X-CRM114-Status: GOOD ( 11.07 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hi Guenter, Geert and Qiu, I fixed the bug which was overrunning the copy when the size was in the between 8*SZREG to 9*SZREG. The SZREG holds the bytes per register size which is 4 for RV32 and 8 for RV64. Do you mind trying this patch? It works OK at my place. Since I had to respin the patch I added word copy without unrolling when the size is in the between 2*SZREG to 9*SZREG to reduce the number of byte copies which has heavy overhead as Palmer has mentioned when he included this patch to riscv/for-next. I rewrote the functions but heavily influenced by Garry's memcpy function [1]. It must be written in assembler to handle page faults manually inside the function unlike other memcpy functions. This patch will reduce cpu usage dramatically in kernel space especially for applications which use sys-call with large buffer size, such as network applications. The main reason behind this is that every unaligned memory access will raise exceptions and switch between s-mode and m-mode causing large overhead. --- v3 -> v4: - Fixed overrun copy - Added word copy without unrolling to reduce byte copy for left over v2 -> v3: - Merged all patches v1 -> v2: - Added shift copy - Separated patches for readability of changes in assembler - Using perf results [1] https://lkml.org/lkml/2021/2/16/778 Akira Tsukamoto (1): riscv: __asm_copy_to-from_user: Optimize unaligned memory access and pipeline stall arch/riscv/lib/uaccess.S | 218 ++++++++++++++++++++++++++++++++------- 1 file changed, 183 insertions(+), 35 deletions(-)