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Wed, 24 Jan 2024 22:10:27 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id z16-20020a544590000000b003bd9c53096csm2856540oib.31.2024.01.24.22.10.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Jan 2024 22:10:27 -0800 (PST) From: Chen Wang To: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com, paul.walmsley@sifive.com, p.zabel@pengutronix.de, robh+dt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com Cc: Chen Wang Subject: [PATCH v2 0/4] riscv: sophgo: add reset support for SG2042 Date: Thu, 25 Jan 2024 14:09:47 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240124_221030_367605_EF71C35B X-CRM114-Status: GOOD ( 10.82 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang From: Chen Wang This series adds reset controller support for Sophgo SG2042 using reset-simple driver. Thanks, Chen --- Changes in v2: This patch series is based on v6.8-rc1. - fixed some minor formatting issues. Note that if you need to pass dtb check, you need to apply a patch. This patch is missing in v6.8-rc1. For details, please see [2]. Changes in v1: The patch series is based on v6.7. You can simply review or test the patches at the link [1]. Link: https://lore.kernel.org/linux-riscv/cover.1704790558.git.unicorn_wang@outlook.com/ [1] Link: https://lore.kernel.org/linux-riscv/MA0P287MB28228572C526C5099A8BDA2DFE7B2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM/T/#u [2] --- Chen Wang (4): dt-bindings: reset: sophgo: support SG2042 reset: sophgo: add SG2042 reset generator driver riscv: dts: add reset generator for Sophgo SG2042 SoC riscv: dts: add resets property for uart node .../bindings/reset/sophgo,sg2042-reset.yaml | 35 ++++++++ arch/riscv/boot/dts/sophgo/sg2042.dtsi | 9 ++ drivers/reset/Kconfig | 1 + drivers/reset/reset-simple.c | 2 + drivers/reset/sophgo/Kconfig | 10 +++ .../dt-bindings/reset/sophgo,sg2042-reset.h | 87 +++++++++++++++++++ 6 files changed, 144 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/sophgo,sg2042-reset.yaml create mode 100644 drivers/reset/sophgo/Kconfig create mode 100644 include/dt-bindings/reset/sophgo,sg2042-reset.h base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d