Show patches with: Archived = No       |   990 patches
« 1 2 3 49 10 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
[RFC,v1,10/10] MAINTAINERS: Add entry for RISC-V ACLINT drivers RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,09/10] dt-bindings: timer: Add ACLINT MSWI and SSWI bindings RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,08/10] dt-bindings: timer: Add ACLINT MTIMER bindings RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,07/10] clocksource: clint: Add support for ACLINT MTIMER device RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,06/10] RISC-V: Select ACLINT SWI driver for virt machine RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,05/10] irqchip: Add ACLINT software interrupt driver RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,04/10] RISC-V: Use IPIs for remote TLB flush when possible RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,03/10] RISC-V: Allow more details in IPI operations RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,02/10] RISC-V: Use common print prefix in smp.c RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[RFC,v1,01/10] RISC-V: Clear SIP bit only when using SBI IPI operations RISC-V ACLINT Support - - - --- 2021-06-12 Anup Patel New
[GIT,PULL] RISC-V Fixes for 5.13-rc6 [GIT,PULL] RISC-V Fixes for 5.13-rc6 - - - --- 2021-06-12 Palmer Dabbelt New
RISC-V: Use asm-generic for {in,out}{bwlq} RISC-V: Use asm-generic for {in,out}{bwlq} - 1 - --- 2021-06-12 Palmer Dabbelt New
[v7,8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine RISC-V CPU Idle Support - - - --- 2021-06-10 Anup Patel New
[v7,7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states RISC-V CPU Idle Support - 1 - --- 2021-06-10 Anup Patel New
[v7,6/8] cpuidle: Add RISC-V SBI CPU idle driver RISC-V CPU Idle Support - - - --- 2021-06-10 Anup Patel New
[v7,5/8] cpuidle: Factor-out power domain related code from PSCI domain driver RISC-V CPU Idle Support - 1 - --- 2021-06-10 Anup Patel New
[v7,4/8] RISC-V: Add SBI HSM suspend related defines RISC-V CPU Idle Support - - - --- 2021-06-10 Anup Patel New
[v7,3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit RISC-V CPU Idle Support - - - --- 2021-06-10 Anup Patel New
[v7,2/8] RISC-V: Rename relocate() and make it global RISC-V CPU Idle Support - - - --- 2021-06-10 Anup Patel New
[v7,1/8] RISC-V: Enable CPU_IDLE drivers RISC-V CPU Idle Support - - - --- 2021-06-10 Anup Patel New
[v6,8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine RISC-V CPU Idle Support - - - --- 2021-06-09 Anup Patel New
[v6,7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states RISC-V CPU Idle Support - 1 - --- 2021-06-09 Anup Patel New
[v6,6/8] cpuidle: Add RISC-V SBI CPU idle driver RISC-V CPU Idle Support - - - --- 2021-06-09 Anup Patel New
[v6,5/8] cpuidle: Factor-out power domain related code from PSCI domain driver RISC-V CPU Idle Support - 1 - --- 2021-06-09 Anup Patel New
[v6,4/8] RISC-V: Add SBI HSM suspend related defines RISC-V CPU Idle Support - - - --- 2021-06-09 Anup Patel New
[v6,3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit RISC-V CPU Idle Support - - - --- 2021-06-09 Anup Patel New
[v6,2/8] RISC-V: Rename relocate() and make it global RISC-V CPU Idle Support - - - --- 2021-06-09 Anup Patel New
[v6,1/8] RISC-V: Enable CPU_IDLE drivers RISC-V CPU Idle Support - - - --- 2021-06-09 Anup Patel New
[v7,1/1] RISC-V: Use SBI SRST extension when available SBI SRST extension support - 1 - --- 2021-06-09 Anup Patel New
[v3,9/9] mm: replace CONFIG_FLAT_NODE_MEM_MAP with CONFIG_FLATMEM Remove DISCONTIGMEM memory model - - - --- 2021-06-08 Mike Rapoport New
[v3,8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA Remove DISCONTIGMEM memory model - - - --- 2021-06-08 Mike Rapoport New
[v3,7/9] docs: remove description of DISCONTIGMEM Remove DISCONTIGMEM memory model - - - --- 2021-06-08 Mike Rapoport New
[v3,6/9] arch, mm: remove stale mentions of DISCONIGMEM Remove DISCONTIGMEM memory model - - - --- 2021-06-08 Mike Rapoport New
[v3,5/9] mm: remove CONFIG_DISCONTIGMEM Remove DISCONTIGMEM memory model - - - --- 2021-06-08 Mike Rapoport New
[v3,4/9] m68k: remove support for DISCONTIGMEM Remove DISCONTIGMEM memory model 1 1 - --- 2021-06-08 Mike Rapoport New
[v3,3/9] arc: remove support for DISCONTIGMEM Remove DISCONTIGMEM memory model 1 - - --- 2021-06-08 Mike Rapoport New
[v3,2/9] arc: update comment about HIGHMEM implementation Remove DISCONTIGMEM memory model 1 - - --- 2021-06-08 Mike Rapoport New
[v3,1/9] alpha: remove DISCONTIGMEM and NUMA Remove DISCONTIGMEM memory model - - - --- 2021-06-08 Mike Rapoport New
[v3,resend,12/15] riscv: convert to setup_initial_init_mm() [v3,resend,01/15] mm: add setup_initial_init_mm() helper - - - --- 2021-06-08 Kefeng Wang New
[v3,resend,01/15] mm: add setup_initial_init_mm() helper [v3,resend,01/15] mm: add setup_initial_init_mm() helper - - - --- 2021-06-08 Kefeng Wang New
[v2] riscv: fix typo in init.c [v2] riscv: fix typo in init.c - - - --- 2021-06-08 Vitaly Wool New
[v3] mm: add setup_initial_init_mm() helper [v3] mm: add setup_initial_init_mm() helper - - - --- 2021-06-07 Kefeng Wang New
riscv32: Use medany C model for modules riscv32: Use medany C model for modules - - - --- 2021-06-06 Khem Raj New
[2/2] riscv: add ASID-based tlbflushing methods [1/2] riscv: pass the mm_struct to __sbi_tlb_flush_range - - 1 --- 2021-06-06 Christoph Hellwig New
[1/2] riscv: pass the mm_struct to __sbi_tlb_flush_range [1/2] riscv: pass the mm_struct to __sbi_tlb_flush_range - - 1 --- 2021-06-06 Christoph Hellwig New
[RFC,v2,11/11] riscv: soc: Allwinner D1 GMAC driver only for temp use riscv: Add DMA_COHERENT support for Allwinner D1 - - 1 --- 2021-06-06 Guo Ren New
[RFC,v2,10/11] riscv: soc: Add Allwinner SoC kconfig option riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,09/11] riscv: soc: Initial DTS for Allwinner D1 NeZha board riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,08/11] riscv: cmo: Add vendor custom icache sync riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,07/11] riscv: cmo: Add dma-noncoherency support riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,06/11] riscv: pgtable: Add DMA_COHERENT with custom PTE attributes riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,05/11] riscv: pgtable: Add custom protection_map init riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,04/11] riscv: pgtable: Fixup _PAGE_CHG_MASK usage riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[V5,3/3] riscv: tlbflush: Optimize coding convention riscv: Add DMA_COHERENT support for Allwinner D1 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,03/11] riscv: asid: Optimize tlbflush coding convention Untitled series #494877 - - - --- 2021-06-06 Guo Ren New
[RFC,v2,02/11] riscv: asid: Add ASID-based tlbflushing methods Untitled series #494875 - 1 - --- 2021-06-06 Guo Ren New
[V5,2/3] riscv: Add ASID-based tlbflushing methods riscv: Add DMA_COHERENT support for Allwinner D1 - 1 - --- 2021-06-06 Guo Ren New
[V5,1/3] riscv: Use global mappings for kernel pages riscv: Add DMA_COHERENT support for Allwinner D1 - 2 - --- 2021-06-06 Guo Ren New
[RFC,v2,01/11] riscv: asid: Use global mappings for kernel pages [RFC,v2,01/11] riscv: asid: Use global mappings for kernel pages - 2 - --- 2021-06-06 Guo Ren New
[GIT,PULL] RISC-V Fixes for 5.13-rc5 [GIT,PULL] RISC-V Fixes for 5.13-rc5 - - - --- 2021-06-05 Palmer Dabbelt New
[RFC] riscv: Enable pud vmap support for Sv48 [RFC] riscv: Enable pud vmap support for Sv48 - - - --- 2021-06-05 Liu Shixin New
[-next] riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT [-next] riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT - - - --- 2021-06-05 Liu Shixin New
[-fixes] riscv: Fix BUILTIN_DTB for sifive and microchip soc [-fixes] riscv: Fix BUILTIN_DTB for sifive and microchip soc - - - --- 2021-06-04 Alex Ghiti New
[v4,4/4] riscv: Map the kernel with correct permissions the first time riscv: Map the kernel with correct permissions the first time - 1 - --- 2021-06-04 Alex Ghiti New
[v4,3/4] riscv: Introduce set_kernel_memory helper riscv: Map the kernel with correct permissions the first time - 1 - --- 2021-06-04 Alex Ghiti New
[v4,2/4] riscv: Simplify xip and !xip kernel address conversion macros riscv: Map the kernel with correct permissions the first time - 1 - --- 2021-06-04 Alex Ghiti New
[v4,1/4] riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED riscv: Map the kernel with correct permissions the first time - - - --- 2021-06-04 Alex Ghiti New
[1/1] riscv: prevent pipeline stall in __asm_to/copy_from_user riscv: better network performance with memcpy, uaccess - - - --- 2021-06-04 Akira Tsukamoto New
[v2,12/15] riscv: convert to setup_initial_init_mm() init_mm: cleanup ARCH's text/data/brk setup code 1 - - --- 2021-06-04 Kefeng Wang New
[v2,01/15] mm: add setup_initial_init_mm() helper init_mm: cleanup ARCH's text/data/brk setup code - - - --- 2021-06-04 Kefeng Wang New
[v2,9/9] mm: replace CONFIG_FLAT_NODE_MEM_MAP with CONFIG_FLATMEM Remove DISCINTIGMEM memory model - - - --- 2021-06-04 Mike Rapoport New
[v2,8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA Remove DISCINTIGMEM memory model - - - --- 2021-06-04 Mike Rapoport New
[v2,7/9] docs: remove description of DISCONTIGMEM Remove DISCINTIGMEM memory model - - - --- 2021-06-04 Mike Rapoport New
[v2,6/9] arch, mm: remove stale mentions of DISCONIGMEM Remove DISCINTIGMEM memory model - - - --- 2021-06-04 Mike Rapoport New
[v2,5/9] mm: remove CONFIG_DISCONTIGMEM Remove DISCINTIGMEM memory model - - - --- 2021-06-04 Mike Rapoport New
[v2,4/9] m68k: remove support for DISCONTIGMEM Remove DISCINTIGMEM memory model 1 1 - --- 2021-06-04 Mike Rapoport New
[v2,3/9] arc: remove support for DISCONTIGMEM Remove DISCINTIGMEM memory model 1 - - --- 2021-06-04 Mike Rapoport New
[v2,2/9] arc: update comment about HIGHMEM implementation Remove DISCINTIGMEM memory model 1 - - --- 2021-06-04 Mike Rapoport New
[v2,1/9] alpha: remove DISCONTIGMEM and NUMA Remove DISCINTIGMEM memory model - - - --- 2021-06-04 Mike Rapoport New
[v5] docs/zh_CN: add translations in zh_CN/dev-tools/kasan [v5] docs/zh_CN: add translations in zh_CN/dev-tools/kasan - 2 - --- 2021-06-03 Wan Jiabing New
riscv: mm: Remove va_kernel_xip_pa_offset symbol from !XIP case riscv: mm: Remove va_kernel_xip_pa_offset symbol from !XIP case - - - --- 2021-06-03 Jisheng Zhang New
[v4] docs/zh_CN: add translations in zh_CN/dev-tools/kasan [v4] docs/zh_CN: add translations in zh_CN/dev-tools/kasan - 1 - --- 2021-06-03 Wan Jiabing New
[v3] docs/zh_CN: add translations in zh_CN/dev-tools/kasan [v3] docs/zh_CN: add translations in zh_CN/dev-tools/kasan - 1 - --- 2021-06-03 Wan Jiabing New
[v3,3/3] riscv: Map the kernel with correct permissions the first time riscv: Map the kernel with correct permissions the first time - 1 - --- 2021-06-03 Alex Ghiti New
[v3,2/3] riscv: Introduce set_kernel_memory helper riscv: Map the kernel with correct permissions the first time - 1 - --- 2021-06-03 Alex Ghiti New
[v3,1/3] riscv: Factorize xip and !xip kernel address conversion macros riscv: Map the kernel with correct permissions the first time - 1 - --- 2021-06-03 Alex Ghiti New
[v2] docs/zh_CN: add translations in zh_CN/dev-tools/kasan [v2] docs/zh_CN: add translations in zh_CN/dev-tools/kasan - 1 - --- 2021-06-02 Wan Jiabing New
[v5,8/8] RISC-V: Enable RISC-V SBI CPU Idle driver for QEMU virt machine RISC-V CPU Idle Support - - - --- 2021-06-02 Anup Patel New
[v5,7/8] dt-bindings: Add common bindings for ARM and RISC-V idle states RISC-V CPU Idle Support - 1 - --- 2021-06-02 Anup Patel New
[v5,6/8] cpuidle: Add RISC-V SBI CPU idle driver RISC-V CPU Idle Support - - - --- 2021-06-02 Anup Patel New
[v5,5/8] cpuidle: Factor-out power domain related code from PSCI domain driver RISC-V CPU Idle Support - 1 - --- 2021-06-02 Anup Patel New
[v5,4/8] RISC-V: Add SBI HSM suspend related defines RISC-V CPU Idle Support - - - --- 2021-06-02 Anup Patel New
[v5,3/8] RISC-V: Add arch functions for non-retentive suspend entry/exit RISC-V CPU Idle Support - - - --- 2021-06-02 Anup Patel New
[v5,2/8] RISC-V: Rename relocate() and make it global RISC-V CPU Idle Support - - - --- 2021-06-02 Anup Patel New
[v5,1/8] RISC-V: Enable CPU_IDLE drivers RISC-V CPU Idle Support - - - --- 2021-06-02 Anup Patel New
[9/9] mm: replace CONFIG_FLAT_NODE_MEM_MAP with CONFIG_FLATMEM Remove DISCINTIGMEM memory model 1 - - --- 2021-06-02 Mike Rapoport New
[8/9] mm: replace CONFIG_NEED_MULTIPLE_NODES with CONFIG_NUMA Remove DISCINTIGMEM memory model 1 - - --- 2021-06-02 Mike Rapoport New
[7/9] docs: remove description of DISCONTIGMEM Remove DISCINTIGMEM memory model - 1 - --- 2021-06-02 Mike Rapoport New
[6/9] arch, mm: remove stale mentions of DISCONIGMEM Remove DISCINTIGMEM memory model - 1 - --- 2021-06-02 Mike Rapoport New
[5/9] mm: remove CONFIG_DISCONTIGMEM Remove DISCINTIGMEM memory model 1 - - --- 2021-06-02 Mike Rapoport New
« 1 2 3 49 10 »