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Apply
«
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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[v2] riscv: always honor the CONFIG_CMDLINE_FORCE when parsing dtb
[v2] riscv: always honor the CONFIG_CMDLINE_FORCE when parsing dtb
- 2 -
-
-
-
2022-07-08
Wenting Zhang
palmer
Accepted
doc: RISC-V: Document that misaligned accesses are supported
doc: RISC-V: Document that misaligned accesses are supported
- - -
-
-
-
2022-07-28
Palmer Dabbelt
palmer
Accepted
riscv: enable software resend of irqs
riscv: enable software resend of irqs
2 1 1
-
-
-
2022-07-29
Conor Dooley
palmer
Accepted
[v4,1/4] dt-bindings: timer: sifive,clint: add legacy riscv compatible
Fix dt-validate issues on qemu dtbdumps due to dt-bindings
- 2 -
-
-
-
2022-08-23
Conor Dooley
palmer
Accepted
[v4,2/4] dt-bindings: interrupt-controller: sifive,plic: add legacy riscv compatible
Fix dt-validate issues on qemu dtbdumps due to dt-bindings
- 2 -
-
-
-
2022-08-23
Conor Dooley
palmer
Accepted
[v4,3/4] dt-bindings: riscv: add new riscv,isa strings for emulators
Fix dt-validate issues on qemu dtbdumps due to dt-bindings
2 2 -
-
-
-
2022-08-23
Conor Dooley
palmer
Accepted
[v2,1/5] riscv: cleanup svpbmt cpufeature probing
Some style cleanups for recent extension additions
- 3 -
-
-
-
2022-09-05
Heiko Stuebner
palmer
Accepted
[v2,2/5] riscv: drop some idefs from CMO initialization
Some style cleanups for recent extension additions
- 3 -
-
-
-
2022-09-05
Heiko Stuebner
palmer
Accepted
[v2,3/5] riscv: use BIT() macros in t-head errata init
Some style cleanups for recent extension additions
- 3 -
-
-
-
2022-09-05
Heiko Stuebner
palmer
Accepted
[v2,4/5] riscv: use BIT() marco for cpufeature probing
Some style cleanups for recent extension additions
- 2 -
-
-
-
2022-09-05
Heiko Stuebner
palmer
Accepted
[v2,5/5] riscv: check for kernel config option in t-head memory types errata
Some style cleanups for recent extension additions
- 3 -
-
-
-
2022-09-05
Heiko Stuebner
palmer
Accepted
[v5,1/7] dt-bindings: sifive-ccache: change Sifive L2 cache to Composable cache
Use composable cache instead of L2 cache
- 2 -
-
-
-
2022-09-13
Zong Li
palmer
Accepted
[v5,2/7] soc: sifive: ccache: Rename SiFive L2 cache to Composable cache.
Use composable cache instead of L2 cache
- 1 -
-
-
-
2022-09-13
Zong Li
palmer
Accepted
[v5,3/7] soc: sifive: ccache: determine the cache level from dts
Use composable cache instead of L2 cache
- 1 -
-
-
-
2022-09-13
Zong Li
palmer
Accepted
[v5,4/7] soc: sifive: ccache: reduce printing on init
Use composable cache instead of L2 cache
- 1 -
-
-
-
2022-09-13
Zong Li
palmer
Accepted
[v5,5/7] soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes
Use composable cache instead of L2 cache
- 1 -
-
-
-
2022-09-13
Zong Li
palmer
Accepted
[v5,6/7] soc: sifive: ccache: define the macro for the register shifts
Use composable cache instead of L2 cache
- 1 -
-
-
-
2022-09-13
Zong Li
palmer
Accepted
[v5,7/7] riscv: Add cache information in AUX vector
Use composable cache instead of L2 cache
- 1 -
-
-
-
2022-09-13
Zong Li
palmer
Accepted
[v4,1/2] riscv: Make VM_WRITE imply VM_READ
Make mmap() with PROT_WRITE imply PROT_READ
- 1 -
-
-
-
2022-09-15
Andrew Bresticker
palmer
Accepted
[v4,2/2] riscv: Allow PROT_WRITE-only mmap()
Make mmap() with PROT_WRITE imply PROT_READ
- 1 -
-
-
-
2022-09-15
Andrew Bresticker
palmer
Accepted
RISC-V: Avoid dereferening NULL regs in die()
RISC-V: Avoid dereferening NULL regs in die()
- 1 -
-
-
-
2022-09-20
Palmer Dabbelt
palmer
Accepted
RISC-V: Make port I/O string accessors actually work
RISC-V: Make port I/O string accessors actually work
- 1 -
-
-
-
2022-09-22
Maciej W. Rozycki
palmer
Accepted
[1/1] riscv/vdso: typo therefor
[1/1] riscv/vdso: typo therefor
- 1 -
-
-
-
2022-09-25
Heinrich Schuchardt
palmer
Accepted
RISC-V: Re-enable counter access from userspace
RISC-V: Re-enable counter access from userspace
- 1 1
-
-
-
2022-09-28
Palmer Dabbelt
palmer
Accepted
[1/2] riscv: fix detection of toolchain Zicbom support
(attempt to) Fix RISC-V toolchain extension support detection
- 2 -
-
-
-
2022-10-06
Conor Dooley
palmer
Accepted
[2/2] riscv: fix detection of toolchain Zihintpause support
(attempt to) Fix RISC-V toolchain extension support detection
- 2 -
-
-
-
2022-10-06
Conor Dooley
palmer
Accepted
[v1,1/1] riscv: mm: add missing memcpy in kasan_init
[v1,1/1] riscv: mm: add missing memcpy in kasan_init
- - 1
-
-
-
2022-10-09
Qinglin Pan
palmer
Accepted
[v3] riscv: support update_mmu_tlb()
[v3] riscv: support update_mmu_tlb()
- 1 -
-
-
-
2022-10-09
Jinyu Tang
palmer
Accepted
[v2] riscv: fix styling in ucontext header
[v2] riscv: fix styling in ucontext header
- 1 -
-
-
-
2022-10-10
Cleo John
palmer
Accepted
[GIT,PULL,1/2] MAINTAINERS: update polarfire soc clock binding
microchip maintainers updates
- - -
-
-
-
2022-10-10
Conor Dooley
palmer
Accepted
[GIT,PULL,2/2] dt-bindings: riscv: update microchip.yaml's maintainership
microchip maintainers updates
1 - -
-
-
-
2022-10-10
Conor Dooley
palmer
Accepted
[v6,1/2] RISC-V: Cache SBI vendor values
riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores
- - -
-
-
-
2022-10-11
Heiko Stuebner
palmer
Accepted
[v6,2/2] drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores
riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores
- 2 -
-
-
-
2022-10-11
Heiko Stuebner
palmer
Accepted
[v1] riscv: dts: sifive unleashed: Add PWM controlled LEDs
[v1] riscv: dts: sifive unleashed: Add PWM controlled LEDs
- 1 1
-
-
-
2022-10-12
Emil Renner Berthing
palmer
Accepted
[v3,1/2] riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT
riscv: Support HAVE_ARCH_HUGE_VMAP and HAVE_ARCH_HUGE_VMALLOC
- 1 1
-
-
-
2022-10-12
Liu Shixin
palmer
Accepted
[v3,2/2] riscv: Enable HAVE_ARCH_HUGE_VMALLOC for 64BIT
riscv: Support HAVE_ARCH_HUGE_VMAP and HAVE_ARCH_HUGE_VMALLOC
- 1 1
-
-
-
2022-10-12
Liu Shixin
palmer
Accepted
[1/4] Documentation: RISC-V: Fix a typo in patch-acceptance
Documentation: RISC-V: patch-acceptance changes
- 1 -
-
-
-
2022-10-13
Palmer Dabbelt
palmer
Superseded
[2/4] Documentation: RISC-V: Allow patches for non-standard behavior
Documentation: RISC-V: patch-acceptance changes
- 3 -
-
-
-
2022-10-13
Palmer Dabbelt
palmer
Superseded
[3/4] Documentation: RISC-V: Mention the UEFI Standards
Documentation: RISC-V: patch-acceptance changes
- 3 -
-
-
-
2022-10-13
Palmer Dabbelt
palmer
Superseded
[4/4] Documentation: RISC-V: patch-acceptance: s/implementor/implementer
Documentation: RISC-V: patch-acceptance changes
- 2 -
-
-
-
2022-10-13
Palmer Dabbelt
palmer
Superseded
[v2] RISC-V: KVM: Fix compilation without RISCV_ISA_ZICBOM
[v2] RISC-V: KVM: Fix compilation without RISCV_ISA_ZICBOM
- 2 -
-
-
-
2022-10-13
Andrew Jones
palmer
Superseded
MAINTAINERS: git://github -> https://github.com for sifive
MAINTAINERS: git://github -> https://github.com for sifive
- - -
-
-
-
2022-10-13
Palmer Dabbelt
palmer
Accepted
[v3,1/2] RISC-V: Fix /proc/cpuinfo cpumask warning
Fix /proc/cpuinfo cpumask warning
- 2 1
-
-
-
2022-10-14
Andrew Jones
palmer
Superseded
[V7,01/12] riscv: elf_kexec: Fixup compile warning
riscv: Add GENERIC_ENTRY support and related features
- 1 -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,02/12] riscv: compat_syscall_table: Fixup compile warning
riscv: Add GENERIC_ENTRY support and related features
- 1 -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,03/12] riscv: ptrace: Remove duplicate operation
riscv: Add GENERIC_ENTRY support and related features
- 1 -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,04/12] compiler_types.h: Add __noinstr_section() for noinstr
riscv: Add GENERIC_ENTRY support and related features
- 2 -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,05/12] riscv: traps: Add noinstr to prevent instrumentation inserted
riscv: Add GENERIC_ENTRY support and related features
- - -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,06/12] riscv: convert to generic entry
riscv: Add GENERIC_ENTRY support and related features
- - 1
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,07/12] riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
riscv: Add GENERIC_ENTRY support and related features
- - -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,08/12] riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK
riscv: Add GENERIC_ENTRY support and related features
- - -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,09/12] riscv: Add support for STACKLEAK gcc plugin
riscv: Add GENERIC_ENTRY support and related features
- - -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,10/12] riscv: Add config of thread stack size
riscv: Add GENERIC_ENTRY support and related features
- - -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,11/12] riscv: remove extra level wrappers of trace_hardirqs_{on,off}
riscv: Add GENERIC_ENTRY support and related features
- 1 -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
[V7,12/12] riscv: Typo fixup for addi -> andi in comment
riscv: Add GENERIC_ENTRY support and related features
- - -
-
-
-
2022-10-15
Guo Ren
palmer
Superseded
mm: remove kern_addr_valid() completely
mm: remove kern_addr_valid() completely
8 - -
-
-
-
2022-10-18
Kefeng Wang
palmer
Awaiting Upstream
riscv: remove special treatment for the link order of head.o
riscv: remove special treatment for the link order of head.o
- - -
-
-
-
2022-10-18
Jisheng Zhang
palmer
Accepted
RISC-V: KVM: Fix kvm_riscv_vcpu_timer_pending() for Sstc
RISC-V: KVM: Fix kvm_riscv_vcpu_timer_pending() for Sstc
- 1 -
-
-
-
2022-10-19
Anup Patel
palmer
Not Applicable
[v4,1/4] RISC-V: Fix compilation without RISCV_ISA_ZICBOM
Add PMEM support for RISC-V
- 2 1
-
-
-
2022-10-19
Anup Patel
palmer
Superseded
[v5,1/4] RISC-V: Fix compilation without RISCV_ISA_ZICBOM
Add PMEM support for RISC-V
- 2 1
-
-
-
2022-10-20
Anup Patel
palmer
Superseded
[v5,2/4] RISC-V: Fix MEMREMAP_WB for systems with Svpbmt
Add PMEM support for RISC-V
- - -
-
-
-
2022-10-20
Anup Patel
palmer
Superseded
[v5,3/4] RISC-V: Implement arch specific PMEM APIs
Add PMEM support for RISC-V
- - -
-
-
-
2022-10-20
Anup Patel
palmer
Superseded
[v5,4/4] RISC-V: Enable PMEM drivers
Add PMEM support for RISC-V
- - -
-
-
-
2022-10-20
Anup Patel
palmer
Superseded
[V5,1/2] riscv: kexec: Fixup irq controller broken in kexec crash path
riscv: kexec: Fxiup crash_save percpu and machine_kexec_mask_interrupts
- 1 -
-
-
-
2022-10-20
Guo Ren
palmer
Accepted
[V5,2/2] riscv: kexec: Fixup crash_smp_send_stop without multi cores
riscv: kexec: Fxiup crash_save percpu and machine_kexec_mask_interrupts
- 1 -
-
-
-
2022-10-20
Guo Ren
palmer
Accepted
[-next] riscv/mm/fault: simplify code for do_page_fault()
[-next] riscv/mm/fault: simplify code for do_page_fault()
- - -
-
-
-
2022-10-21
Tong Tiangen
palmer
Superseded
RISC-V: enable sparsemem by default for defconfig
RISC-V: enable sparsemem by default for defconfig
- - -
-
-
-
2022-10-21
Conor Dooley
palmer
Accepted
Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend"
Revert "clocksource/drivers/riscv: Events are stopped during CPU suspend"
1 1 -
-
-
-
2022-10-23
Conor Dooley
palmer
Awaiting Upstream
[v1,1/2] stackprotector: move CANARY_MASK and get_random_canary() into stackprotector.h
cleanup stackprotector canary generation
- 1 -
-
-
-
2022-10-23
Jason A. Donenfeld
palmer
Not Applicable
[v1,2/2] stackprotector: actually use get_random_canary()
cleanup stackprotector canary generation
2 - -
-
-
-
2022-10-23
Jason A. Donenfeld
palmer
Not Applicable
[v2,1/3] RISC-V: Improve use of isa2hwcap[]
RISC-V: Ensure Zicbom has a valid block size
- 2 -
-
-
-
2022-10-24
Andrew Jones
palmer
Superseded
[v2,2/3] RISC-V: Introduce riscv_isa_extension_check
RISC-V: Ensure Zicbom has a valid block size
- 2 -
-
-
-
2022-10-24
Andrew Jones
palmer
Superseded
[v2,3/3] RISC-V: Ensure Zicbom has a valid block size
RISC-V: Ensure Zicbom has a valid block size
- 2 -
-
-
-
2022-10-24
Andrew Jones
palmer
Superseded
[-next,1/2] riscv/mm: hugepage's PG_dcache_clean flag is only set in head page
riscv/mm: two modifications on hugepage
- - -
-
-
-
2022-10-24
Tong Tiangen
palmer
Accepted
[-next,2/2] riscv/mm: add arch hook arch_clear_hugepage_flags
riscv/mm: two modifications on hugepage
- - -
-
-
-
2022-10-24
Tong Tiangen
palmer
Accepted
[RESEND,v9] riscv: add riscv rethook implementation
[RESEND,v9] riscv: add riscv rethook implementation
1 - -
-
-
-
2022-10-25
Conor Dooley
palmer
Accepted
[v2,1/2] arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt …
RZ/G2UL separate out SoC specific parts
- 2 -
-
-
-
2022-10-25
Prabhakar
palmer
Accepted
[v2,2/2] arm64: dts: renesas: r9a07g043: Split out RZ/G2UL SoC specific parts
RZ/G2UL separate out SoC specific parts
- 1 -
-
-
-
2022-10-25
Prabhakar
palmer
Accepted
[V5,1/2] RISC-V: Add arch_crash_save_vmcoreinfo support
Support VMCOREINFO export for RISCV64
- - 2
-
-
-
2022-10-26
Xianting Tian
palmer
Accepted
[V5,2/2] Documentation: kdump: describe VMCOREINFO export for RISCV64
Support VMCOREINFO export for RISCV64
- 1 -
-
-
-
2022-10-26
Xianting Tian
palmer
Accepted
[1/9] RISC-V: Factor out body of riscv_init_cbom_blocksize loop
RISC-V: Apply Zicboz to clear_page and memset
- 2 -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[2/9] RISC-V: Add Zicboz detection and block size parsing
RISC-V: Apply Zicboz to clear_page and memset
- 2 -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[3/9] RISC-V: insn-def: Define cbo.zero
RISC-V: Apply Zicboz to clear_page and memset
- 2 -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[4/9] RISC-V: Use Zicboz in clear_page when available
RISC-V: Apply Zicboz to clear_page and memset
- - -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[5/9] RISC-V: KVM: Provide UAPI for Zicboz block size
RISC-V: Apply Zicboz to clear_page and memset
- 2 -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[6/9] RISC-V: KVM: Expose Zicboz to the guest
RISC-V: Apply Zicboz to clear_page and memset
- 2 -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[7/9] RISC-V: lib: Improve memset assembler formatting
RISC-V: Apply Zicboz to clear_page and memset
- 1 -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[8/9] RISC-V: lib: Use named labels in memset
RISC-V: Apply Zicboz to clear_page and memset
- 1 -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[9/9] RISC-V: Use Zicboz in memset when available
RISC-V: Apply Zicboz to clear_page and memset
- - -
-
-
-
2022-10-27
Andrew Jones
palmer
Changes Requested
[v5,1/7] dt-bindings: riscv: Sort the CPU core list alphabetically
Add support for Renesas RZ/Five SoC
- 5 -
1
-
1
2022-10-28
Prabhakar
palmer
Not Applicable
[v5,2/7] dt-bindings: riscv: Add Andes AX45MP core to the list
Add support for Renesas RZ/Five SoC
1 3 -
1
-
1
2022-10-28
Prabhakar
palmer
Not Applicable
[v5,3/7] riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option
Add support for Renesas RZ/Five SoC
- 3 -
1
-
1
2022-10-28
Prabhakar
palmer
Not Applicable
[v5,4/7] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC
Add support for Renesas RZ/Five SoC
- 1 -
1
-
1
2022-10-28
Prabhakar
palmer
Not Applicable
[v5,5/7] riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK
Add support for Renesas RZ/Five SoC
- 1 -
1
-
1
2022-10-28
Prabhakar
palmer
Not Applicable
[v5,6/7] MAINTAINERS: Add entry for Renesas RISC-V
Add support for Renesas RZ/Five SoC
- 3 -
1
-
1
2022-10-28
Prabhakar
palmer
Not Applicable
[v5,7/7] riscv: configs: defconfig: Enable Renesas RZ/Five SoC
Add support for Renesas RZ/Five SoC
- 3 -
1
-
1
2022-10-28
Prabhakar
palmer
Not Applicable
RISC-V: Do not issue remote fences until smp is available
RISC-V: Do not issue remote fences until smp is available
- - -
1
-
1
2022-10-28
Atish Kumar Patra
palmer
Rejected
[-next,v2] riscv/mm/fault: simplify code for do_page_fault()
[-next,v2] riscv/mm/fault: simplify code for do_page_fault()
- - -
10
2
1
2022-10-29
Tong Tiangen
palmer
Changes Requested
riscv: process: fix kernel info leakage
riscv: process: fix kernel info leakage
- - 1
11
1
1
2022-10-29
Jisheng Zhang
palmer
Accepted
[1/8] riscv/kprobe: Prepare the skeleton to implement RISCV OPTPROBES feature
Add OPTPROBES feature on RISCV
- - -
11
2
1
2022-10-30
Xim
palmer
Superseded
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