Show patches with: Submitter = Jisheng Zhang       |   384 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
riscv: boot: remove duplicated targets line riscv: boot: remove duplicated targets line - 1 - 13-- 2024-04-14 Jisheng Zhang New
[v3,2/2] clocksource/drivers/timer-clint: Add T-Head C9xx clint riscv: improve nommu and timer-clint - - - --1 2024-04-10 Jisheng Zhang New
[v3,1/2] riscv: nommu: remove PAGE_OFFSET hardcoding riscv: improve nommu and timer-clint - - - --1 2024-04-10 Jisheng Zhang New
[v3,RESEND,2/2] riscv: cmpxchg: implement arch_cmpxchg64_{relaxed|acquire|release} riscv: enable lockless lockref implementation - 1 - --- 2024-03-25 Jisheng Zhang New
[v3,RESEND,1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF riscv: enable lockless lockref implementation - 1 - --- 2024-03-25 Jisheng Zhang New
[v3,RESEND] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required [v3,RESEND] riscv: mm: still create swiotlb buffer for kmalloc() bouncing if required - 1 - 13-- 2024-03-25 Jisheng Zhang New
[v3,RESEND] riscv: select ARCH_HAS_FAST_MULTIPLIER [v3,RESEND] riscv: select ARCH_HAS_FAST_MULTIPLIER - 2 1 13-- 2024-03-25 Jisheng Zhang New
[v2] riscv: Use asm-generic for {read,write}{bwlq} and their relaxed variant [v2] riscv: Use asm-generic for {read,write}{bwlq} and their relaxed variant - 1 - 13-- 2023-12-02 Jisheng Zhang New
[v3,4/4] riscv: entry: consolidate general regs saving/restoring riscv: entry: further clean up and VMAP_STACK fix - 1 - --- 2022-10-03 Jisheng Zhang New
[v3,3/4] riscv: fix race when vmap stack overflow and remove shadow_stack riscv: entry: further clean up and VMAP_STACK fix - - - --- 2022-10-03 Jisheng Zhang New
[v3,2/4] riscv: consolidate ret_from_kernel_thread into ret_from_fork riscv: entry: further clean up and VMAP_STACK fix 1 - - --- 2022-10-03 Jisheng Zhang New
[v3,1/4] riscv: process: fix kernel info leakage riscv: entry: further clean up and VMAP_STACK fix - 1 - --- 2022-10-03 Jisheng Zhang New
[v3,3/3] riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc - - - --- 2022-09-25 Jisheng Zhang New
[v3,2/3] RISC-V: KVM: Use generic guest entry infrastructure riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc - - - --- 2022-09-25 Jisheng Zhang New
[v3,1/3] RISC-V: KVM: Record number of signal exits as a vCPU stat riscv: kvm: use generic entry for TIF_NOTIFY_RESUME and misc - 1 - --- 2022-09-25 Jisheng Zhang New
riscv: vdso: reorganise the file to remove two forward declarations. riscv: vdso: reorganise the file to remove two forward declarations. - - - --- 2022-09-24 Jisheng Zhang New
[v3] riscv: vdso: fix NULL deference in vdso_join_timens() when vfork [v3] riscv: vdso: fix NULL deference in vdso_join_timens() when vfork - - - --- 2022-09-24 Jisheng Zhang New
vdso: fix NULL deference in vdso_join_timens() when vfork vdso: fix NULL deference in vdso_join_timens() when vfork - - - --- 2022-09-07 Jisheng Zhang New
[v2,5/5] riscv: Allow to enable RT riscv: add PREEMPT_RT support - - - --- 2022-08-31 Jisheng Zhang New
[v2,4/5] riscv: add lazy preempt support riscv: add PREEMPT_RT support - - - --- 2022-08-31 Jisheng Zhang New
[v2,3/5] riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK riscv: add PREEMPT_RT support - - - --- 2022-08-31 Jisheng Zhang New
[v2,2/5] RISC-V: KVM: Use generic guest entry infrastructure riscv: add PREEMPT_RT support - - - --- 2022-08-31 Jisheng Zhang New
[v2,1/5] RISC-V: KVM: Record number of signal exits as a vCPU stat riscv: add PREEMPT_RT support - - - --- 2022-08-31 Jisheng Zhang New
[v6,RESEND,2/2] riscv: turn pgtable_l4|[l5]_enabled to static key for RV64 use static key to optimize pgtable_l4_enabled - 1 - --- 2022-08-21 Jisheng Zhang New
[v6,RESEND,1/2] riscv: move sbi_init() earlier before jump_label_init() use static key to optimize pgtable_l4_enabled - 2 - --- 2022-08-21 Jisheng Zhang New
[v6,2/2] riscv: turn pgtable_l4|[l5]_enabled to static key for RV64 use static key to optimize pgtable_l4_enabled - 1 - --- 2022-07-16 Jisheng Zhang New
[v6,1/2] riscv: move sbi_init() earlier before jump_label_init() use static key to optimize pgtable_l4_enabled - 2 - --- 2022-07-16 Jisheng Zhang New
[v5] riscv: add irq stack support [v5] riscv: add irq stack support - - - --- 2022-07-15 Jisheng Zhang New
[v5,2/2] riscv: turn pgtable_l4|[l5]_enabled to static key for RV64 use static key to optimize pgtable_l4_enabled - 1 - --- 2022-07-15 Jisheng Zhang New
[v5,1/2] riscv: move sbi_init() earlier before jump_label_init() use static key to optimize pgtable_l4_enabled - 2 - --- 2022-07-15 Jisheng Zhang New
[v4] riscv: add irq stack support [v4] riscv: add irq stack support - - - --- 2022-05-24 Jisheng Zhang New
[v2,2/2] riscv: switch has_fpu() to the unified static key mechanism introduce unified static key mechanism for ISA ext - 2 - --- 2022-05-22 Jisheng Zhang New
[v2,1/2] riscv: introduce unified static key mechanism for ISA extensions introduce unified static key mechanism for ISA ext - 2 - --- 2022-05-22 Jisheng Zhang New
[v4,2/2] riscv: turn pgtable_l4|[l5]_enabled to static key for RV64 use static key to optimize pgtable_l4_enabled - 1 - --- 2022-05-21 Jisheng Zhang New
[v4,1/2] riscv: move sbi_init() earlier before jump_label_init() use static key to optimize pgtable_l4_enabled - 2 - --- 2022-05-21 Jisheng Zhang New
[v3,2/2] riscv: turn pgtable_l4|[l5]_enabled to static key for RV64 use static key to optimize pgtable_l4_enabled - 1 - --- 2022-05-19 Jisheng Zhang New
[v3,1/2] riscv: move sbi_init() earlier before jump_label_init() use static key to optimize pgtable_l4_enabled - - - --- 2022-05-19 Jisheng Zhang New
[2/2] riscv: switch has_fpu() to the unified static key mechanism introduce unified static key mechanism for ISA ext - - - --- 2022-05-17 Jisheng Zhang New
[1/2] riscv: introduce unified static key mechanism for ISA extensions introduce unified static key mechanism for ISA ext - - - --- 2022-05-17 Jisheng Zhang New
[v2] riscv: mm: init: make pt_ops_set_[early|late|fixmap] static [v2] riscv: mm: init: make pt_ops_set_[early|late|fixmap] static - 2 - --- 2022-05-16 Jisheng Zhang New
[v3] riscv: add irq stack support [v3] riscv: add irq stack support - - - --- 2022-05-15 Jisheng Zhang New
[v2,4/4] riscv: convert pgtable_l4|[l5]_enabled to static key unified way to use static key and optimize pgtable_l4_enabled - - - --- 2022-05-08 Jisheng Zhang New
[v2,3/4] riscv: replace has_fpu() with system_supports_fpu() unified way to use static key and optimize pgtable_l4_enabled - - - --- 2022-05-08 Jisheng Zhang New
[v2,2/4] riscv: introduce unified static key mechanism for CPU features unified way to use static key and optimize pgtable_l4_enabled - - - --- 2022-05-08 Jisheng Zhang New
[v2,1/4] riscv: mm: init: make pt_ops_set_[early|late|fixmap] static unified way to use static key and optimize pgtable_l4_enabled - 1 - --- 2022-05-08 Jisheng Zhang New
[v2] riscv: add irq stack support [v2] riscv: add irq stack support - - - --- 2022-03-07 Jisheng Zhang New
riscv: alternative only works on !XIP_KERNEL riscv: alternative only works on !XIP_KERNEL - - - --- 2022-02-10 Jisheng Zhang New
[RFC] riscv: reduce THREAD_SIZE from 16KB to 8KB for RV64 [RFC] riscv: reduce THREAD_SIZE from 16KB to 8KB for RV64 - - - --- 2022-02-06 Jisheng Zhang New
riscv: add irq stack support riscv: add irq stack support - - - --- 2022-02-06 Jisheng Zhang New
[3/3] riscv: convert pgtable_l4_enabled to static key unified way to use static key and optimize pgtable_l4_enabled - - - --- 2022-01-25 Jisheng Zhang New
[2/3] riscv: replace has_fpu() with system_supports_fpu() unified way to use static key and optimize pgtable_l4_enabled - - - --- 2022-01-25 Jisheng Zhang New
[1/3] riscv: introduce unified static key mechanism for CPU features unified way to use static key and optimize pgtable_l4_enabled - - - --- 2022-01-25 Jisheng Zhang New
riscv: mm: init: mark satp_mode __ro_after_init riscv: mm: init: mark satp_mode __ro_after_init - - - --- 2022-01-25 Jisheng Zhang New
riscv: mm: remove the BUG_ON check of mapping the last 4K bytes of memory riscv: mm: remove the BUG_ON check of mapping the last 4K bytes of memory - 1 - --- 2022-01-25 Jisheng Zhang New
riscv: extable: fix err reg writing in dedicated uaccess handler riscv: extable: fix err reg writing in dedicated uaccess handler - - - --- 2022-01-23 Jisheng Zhang New
[riscv-next] riscv: bpf: Fix eBPF's exception tables [riscv-next] riscv: bpf: Fix eBPF's exception tables 1 - - --- 2022-01-10 Jisheng Zhang New
[v2,5/5] arm: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef - 1 - --- 2021-12-06 Jisheng Zhang New
[v2,4/5] arm64: mm: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef 1 - - --- 2021-12-06 Jisheng Zhang New
[v2,3/5] x86/setup: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef - - - --- 2021-12-06 Jisheng Zhang New
[v2,2/5] riscv: mm: init: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef 1 - - --- 2021-12-06 Jisheng Zhang New
[v2,1/5] kexec: make crashk_res, crashk_low_res and crash_notes symbols always visible kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef - - - --- 2021-12-06 Jisheng Zhang New
[v2,5/5] riscv: mm: init: try best to remove #ifdef CONFIG_XIP_KERNEL usage riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-06 Jisheng Zhang New
[v2,4/5] riscv: mm: init: try IS_ENABLED(CONFIG_XIP_KERNEL) instead of #ifdef riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-06 Jisheng Zhang New
[v2,3/5] riscv: mm: init: remove _pt_ops and use pt_ops directly riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-06 Jisheng Zhang New
[v2,2/5] riscv: mm: init: try best to use IS_ENABLED(CONFIG_64BIT) instead of #ifdef riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-06 Jisheng Zhang New
[v2,1/5] riscv: mm: init: remove unnecessary "#ifdef CONFIG_CRASH_DUMP" riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-06 Jisheng Zhang New
[RFC,5/5] arm: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef - 1 - --- 2021-12-03 Jisheng Zhang New
[RFC,4/5] arm64: mm: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef 1 - - --- 2021-12-03 Jisheng Zhang New
[RFC,3/5] x86/setup: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef - - - --- 2021-12-03 Jisheng Zhang New
[RFC,2/5] riscv: mm: init: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef - - - --- 2021-12-03 Jisheng Zhang New
[RFC,1/5] kexec: make crashk_res, crashk_low_res and crash_notes symbols always visible kexec: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdef - - - --- 2021-12-03 Jisheng Zhang New
[5/5] riscv: mm: init: try best to remove #ifdef CONFIG_XIP_KERNEL usage riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-03 Jisheng Zhang New
[4/5] riscv: mm: init: try IS_ENABLED(CONFIG_XIP_KERNEL) instead of #ifdef riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-03 Jisheng Zhang New
[3/5] riscv: mm: init: remove _pt_ops and use pt_ops directly riscv: mm: init clean up #ifdefs - - - --- 2021-12-03 Jisheng Zhang New
[2/5] riscv: mm: init: try best to IS_ENABLED(CONFIG_64BIT) instead of #ifdef riscv: mm: init clean up #ifdefs - - - --- 2021-12-03 Jisheng Zhang New
[1/5] riscv: mm: init: remove unnecessary "#ifdef CONFIG_CRASH_DUMP" riscv: mm: init clean up #ifdefs - 1 - --- 2021-12-03 Jisheng Zhang New
riscv: mm: fix wrong phys_ram_base value for RV64 riscv: mm: fix wrong phys_ram_base value for RV64 - 1 - --- 2021-12-02 Jisheng Zhang New
[5/5] riscv: head: remove useless __PAGE_ALIGNED_BSS and .balign riscv: misc clean up - - - --- 2021-11-28 Jisheng Zhang New
[4/5] riscv: errata: alternative: mark vendor_patch_func __initdata riscv: misc clean up - - - --- 2021-11-28 Jisheng Zhang New
[3/5] riscv: kvm: make kvm_riscv_vcpu_fp_clean() static riscv: misc clean up - - - --- 2021-11-28 Jisheng Zhang New
[2/5] riscv: head: make secondary_start_common() static riscv: misc clean up - - - --- 2021-11-28 Jisheng Zhang New
[1/5] riscv: remove cpu_stop() riscv: misc clean up - - - --- 2021-11-28 Jisheng Zhang New
[v3] riscv: fix race when vmap stack overflow [v3] riscv: fix race when vmap stack overflow - 1 - 12-2 2022-10-30 Jisheng Zhang palmer Under Review
[v2,RESEND] riscv: mm: implement pgprot_nx [v2,RESEND] riscv: mm: implement pgprot_nx - 3 1 --- 2024-03-25 Jisheng Zhang Accepted
[v4,2/2] riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - - - 11-2 2023-12-25 Jisheng Zhang Accepted
[v4,1/2] riscv: introduce RISCV_EFFICIENT_UNALIGNED_ACCESS riscv: enable EFFICIENT_UNALIGNED_ACCESS and DCACHE_WORD_ACCESS - 2 - 12-1 2023-12-25 Jisheng Zhang Accepted
[4/4] riscv: enable HAVE_FAST_GUP if MMU riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
[3/4] riscv: enable MMU_GATHER_RCU_TABLE_FREE for SMP && MMU riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
[2/4] riscv: tlb: convert __p*d_free_tlb() to inline functions riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
[1/4] riscv: tlb: fix __p*d_free_tlb() riscv: support fast gup - 1 - 13-- 2023-12-19 Jisheng Zhang Accepted
riscv: Select ARCH_WANTS_NO_INSTR riscv: Select ARCH_WANTS_NO_INSTR - - - 13-- 2023-11-23 Jisheng Zhang Accepted
riscv: mm: implement pgprot_nx riscv: mm: implement pgprot_nx - 3 1 13-- 2023-11-21 Jisheng Zhang Accepted
[RESEND,v4,2/2] riscv: errata: thead: use pa based instructions for CMO riscv: errata: thead: use riscv_nonstd_cache_ops for CMO - 1 - 12-1 2023-11-14 Jisheng Zhang Accepted
[RESEND,v4,1/2] riscv: errata: thead: use riscv_nonstd_cache_ops for CMO riscv: errata: thead: use riscv_nonstd_cache_ops for CMO - 1 1 11-2 2023-11-14 Jisheng Zhang Accepted
[v2,5/5] riscv: dts: sophgo: add Milk-V Duo board device tree Add Milk-V Duo board support 1 - - --1 2023-10-06 Jisheng Zhang Accepted
[v2,4/5] riscv: dts: sophgo: add initial CV1800B SoC device tree Add Milk-V Duo board support 1 - - --1 2023-10-06 Jisheng Zhang Accepted
[v2,3/5] dt-bindings: riscv: Add Milk-V Duo board compatibles Add Milk-V Duo board support 2 - - --1 2023-10-06 Jisheng Zhang Accepted
[v2,2/5] dt-bindings: timer: Add SOPHGO CV1800B clint Add Milk-V Duo board support 1 - - --1 2023-10-06 Jisheng Zhang Accepted
[v2,1/5] dt-bindings: interrupt-controller: Add SOPHGO CV1800B plic Add Milk-V Duo board support 1 - - --1 2023-10-06 Jisheng Zhang Accepted
soc: renesas: make ARCH_R9A07G043 (riscv version) depend on NONPORTABLE soc: renesas: make ARCH_R9A07G043 (riscv version) depend on NONPORTABLE - 2 1 14-- 2023-10-04 Jisheng Zhang Accepted
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