Message ID | 076a8fe4056e4137865eb440564dd598@huawei.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | This patch propose to solve a driver incompatibility issue due to the current starting IO address for PCI addressing on RISCV arch. | expand |
diff --git a/arch/riscv/include/asm/pci.h b/arch/riscv/include/asm/pci.h index 7fd52a30e605..15da9129aace 100644 --- a/arch/riscv/include/asm/pci.h +++ b/arch/riscv/include/asm/pci.h @@ -12,7 +12,7 @@ #include <asm/io.h> -#define PCIBIOS_MIN_IO 0 +#define PCIBIOS_MIN_IO 0x1000 #define PCIBIOS_MIN_MEM 0 /* RISC-V shim does not initialize PCI bus */
The issue was observed when virtio drivers failed to load for a Virtio network PCI device (1af4:1000). The current implementation of virtio does not permit to have a PCI resource block starting at the address 0. This can be observed in function pci_iomap_range, at line 28 of file ./lib/pci_iomap.c: 37 if (len <= offset || !start) 38 return NULL; Because start variable value corresponds to the PCI resource start address: 33 resource_size_t start = pci_resource_start(dev, bar); In function virtio_pci_legacy_probe (line 212), in file ./drivers/virtio/virtio_pci_legacy.c, the returned NULL value results in returning the ENOMEM error: 246 rc = -ENOMEM; 247 vp_dev->ioaddr = pci_iomap(pci_dev, 0, 0); 248 if (!vp_dev->ioaddr) 249 goto err_iomap; As it is already the case for other architectures (like ARM64), I suggest to add an offset the PCIBIOS_MIN_IO constant, it forces IO resource address to be non zero. Not enough knowledge on PCI to evaluate possible issues resulting from PCIBIOS_MIN_IO value change. Signed-off-by: Nicolas Peslerbe <nicolas.peslerbe@huawei.com> --- arch/riscv/include/asm/pci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.32.0