| Message ID | 1558361478-4381-4-git-send-email-sagar.kadam@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Extend dt bindings to support I2C on sifive devices and a fix broken IRQ in polling mode. | expand |
On Mon, May 20, 2019 at 07:41:18PM +0530, Sagar Shrikant Kadam wrote: > The i2c-ocore driver already has a polling mode interface.But it needs > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from working, and also the I2C controller's interrupt bit > cannot be cleared if set, due to this the existing i2c polling mode > interface added in mainline earlier doesn't work, and CPU stall's > infinitely, when-ever i2c transfer is initiated. > > Ref:previous polling mode support in mainline > > commit 69c8c0c0efa8 ("i2c: ocores: add polling interface") > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > FU540-COOO SoC. > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Much better, thanks. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
On Mon, May 20, 2019 at 8:22 PM Andrew Lunn <andrew@lunn.ch> wrote: > > On Mon, May 20, 2019 at 07:41:18PM +0530, Sagar Shrikant Kadam wrote: > > The i2c-ocore driver already has a polling mode interface.But it needs > > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > > There is an erratum in FU540 chip that prevents interrupt driven i2c > > transfers from working, and also the I2C controller's interrupt bit > > cannot be cleared if set, due to this the existing i2c polling mode > > interface added in mainline earlier doesn't work, and CPU stall's > > infinitely, when-ever i2c transfer is initiated. > > > > Ref:previous polling mode support in mainline > > > > commit 69c8c0c0efa8 ("i2c: ocores: add polling interface") > > > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > > FU540-COOO SoC. > > > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> > > Much better, thanks. My pleasure Andrew. Appreciate your timely review and response. > > Reviewed-by: Andrew Lunn <andrew@lunn.ch> > > Andrew Thanks, Sagar
On Mai 20 2019, Sagar Shrikant Kadam <sagar.kadam@sifive.com> wrote: > The i2c-ocore driver already has a polling mode interface.But it needs > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > There is an erratum in FU540 chip that prevents interrupt driven i2c > transfers from working, and also the I2C controller's interrupt bit > cannot be cleared if set, due to this the existing i2c polling mode > interface added in mainline earlier doesn't work, and CPU stall's > infinitely, when-ever i2c transfer is initiated. > > Ref:previous polling mode support in mainline > > commit 69c8c0c0efa8 ("i2c: ocores: add polling interface") > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > FU540-COOO SoC. After commit dd7dbf0eb090 this no longer fits. Andreas.
Thanks Andreas, Yes, I rebased to v5.2-rc1 and observed that there have been changes in polling interface, and i2c->flags is not longer being used for setting the polling mode. I am working on a way to hook in the fix for broken IRQ and will submit it in v6. Thanks & BR, Sagar Kadam On Tue, May 21, 2019 at 2:03 PM Andreas Schwab <schwab@suse.de> wrote: > > On Mai 20 2019, Sagar Shrikant Kadam <sagar.kadam@sifive.com> wrote: > > > The i2c-ocore driver already has a polling mode interface.But it needs > > a workaround for FU540 Chipset on HiFive unleashed board (RevA00). > > There is an erratum in FU540 chip that prevents interrupt driven i2c > > transfers from working, and also the I2C controller's interrupt bit > > cannot be cleared if set, due to this the existing i2c polling mode > > interface added in mainline earlier doesn't work, and CPU stall's > > infinitely, when-ever i2c transfer is initiated. > > > > Ref:previous polling mode support in mainline > > > > commit 69c8c0c0efa8 ("i2c: ocores: add polling interface") > > > > The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for > > FU540-COOO SoC. > > After commit dd7dbf0eb090 this no longer fits. > > Andreas. > > -- > Andreas Schwab, SUSE Labs, schwab@suse.de > GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 > "And now for something completely different."
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c index aee1d86..c3bc97d 100644 --- a/drivers/i2c/busses/i2c-ocores.c +++ b/drivers/i2c/busses/i2c-ocores.c @@ -27,6 +27,7 @@ #include <linux/jiffies.h> #define OCORES_FLAG_POLL BIT(0) +#define OCORES_FLAG_BROKEN_IRQ BIT(1) /* Broken IRQ for FU540-C000 SoC */ /* * 'process_lock' exists because ocores_process() and ocores_process_timeout() @@ -239,9 +240,13 @@ static irqreturn_t ocores_isr(int irq, void *dev_id) struct ocores_i2c *i2c = dev_id; u8 stat = oc_getreg(i2c, OCI2C_STATUS); - if (!(stat & OCI2C_STAT_IF)) + if (i2c->flags & OCORES_FLAG_BROKEN_IRQ) { + if (stat & OCI2C_STAT_IF) + if (!(stat & OCI2C_STAT_BUSY)) + return IRQ_NONE; + } else if (!(stat & OCI2C_STAT_IF)) { return IRQ_NONE; - + } ocores_process(i2c, stat); return IRQ_HANDLED; @@ -356,6 +361,11 @@ static void ocores_process_polling(struct ocores_i2c *i2c) ret = ocores_isr(-1, i2c); if (ret == IRQ_NONE) break; /* all messages have been transferred */ + else { + if (i2c->flags & OCORES_FLAG_BROKEN_IRQ) + if (i2c->state == STATE_DONE) + break; + } } } @@ -601,6 +611,7 @@ static int ocores_i2c_probe(struct platform_device *pdev) { struct ocores_i2c *i2c; struct ocores_i2c_platform_data *pdata; + const struct of_device_id *match; struct resource *res; int irq; int ret; @@ -683,6 +694,13 @@ static int ocores_i2c_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); if (irq == -ENXIO) { i2c->flags |= OCORES_FLAG_POLL; + /* + * Set in OCORES_FLAG_BROKEN_IRQ to enable workaround for + * FU540-C000 SoC in polling mode. + */ + match = of_match_node(ocores_i2c_match, pdev->dev.of_node); + if (match && (long)match->data == TYPE_SIFIVE_REV0) + i2c->flags |= OCORES_FLAG_BROKEN_IRQ; } else { if (irq < 0) return irq;
The i2c-ocore driver already has a polling mode interface.But it needs a workaround for FU540 Chipset on HiFive unleashed board (RevA00). There is an erratum in FU540 chip that prevents interrupt driven i2c transfers from working, and also the I2C controller's interrupt bit cannot be cleared if set, due to this the existing i2c polling mode interface added in mainline earlier doesn't work, and CPU stall's infinitely, when-ever i2c transfer is initiated. Ref:previous polling mode support in mainline commit 69c8c0c0efa8 ("i2c: ocores: add polling interface") The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for FU540-COOO SoC. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> --- drivers/i2c/busses/i2c-ocores.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-)