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Fri, 25 Oct 2019 08:30:03 +0000 Received: from CH2PR13MB3368.namprd13.prod.outlook.com ([fe80::c069:f0c7:760b:faba]) by CH2PR13MB3368.namprd13.prod.outlook.com ([fe80::c069:f0c7:760b:faba%3]) with mapi id 15.20.2387.021; Fri, 25 Oct 2019 08:30:03 +0000 From: Yash Shah To: "Paul Walmsley ( Sifive)" , "Palmer Dabbelt ( Sifive)" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: [PATCH v2] RISC-V: Add PCIe I/O BAR memory mapping Thread-Topic: [PATCH v2] RISC-V: Add PCIe I/O BAR memory mapping Thread-Index: AQHViw5l0jY9JQhUEkq6xffYZOywOQ== Date: Fri, 25 Oct 2019 08:30:03 +0000 Message-ID: <1571992163-6811-1-git-send-email-yash.shah@sifive.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MA1PR0101CA0053.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:20::15) To CH2PR13MB3368.namprd13.prod.outlook.com (2603:10b6:610:2c::26) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yash.shah@sifive.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 1.9.1 x-originating-ip: [114.143.65.226] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0a7ae2d2-c919-40fa-f1ad-08d75925883d x-ms-traffictypediagnostic: CH2PR13MB3751: x-ms-exchange-purlcount: 1 x-ld-processed: 22f88e9d-ae0d-4ed9-b984-cdc9be1529f1,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; 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X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.71.76 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "sorear2@gmail.com" , "aou@eecs.berkeley.edu" , "alex@ghiti.fr" , "catalin.marinas@arm.com" , "Anup.Patel@wdc.com" , Yash Shah , "rppt@linux.ibm.com" , Sachin Ghadi , "logang@deltatee.com" , Greentime Hu , "gregkh@linuxfoundation.org" , "tglx@linutronix.de" , "will@kernel.org" , "allison@lohutok.net" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org For legacy I/O BARs (non-MMIO BARs) to work correctly on RISC-V Linux, we need to establish a reserved memory region for them, so that drivers that wish to use the legacy I/O BARs can issue reads and writes against a memory region that is mapped to the host PCIe controller's I/O BAR mapping. Signed-off-by: Yash Shah --- Changes in v2: - update patch description as per Paul's suggestion https://lore.kernel.org/linux-riscv/alpine.DEB.2.21.9999.1910240937350.20010@viisi.sifive.com/ --- arch/riscv/include/asm/io.h | 7 +++++++ arch/riscv/include/asm/pgtable.h | 7 ++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index fc1189a..3ba4d93 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -13,6 +13,7 @@ #include #include +#include extern void __iomem *ioremap(phys_addr_t offset, unsigned long size); @@ -162,6 +163,12 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #endif /* + * I/O port access constants. + */ +#define IO_SPACE_LIMIT (PCI_IO_SIZE - 1) +#define PCI_IOBASE ((void __iomem *)PCI_IO_START) + +/* * Emulation routines for the port-mapped IO space used by some PCI drivers. * These are defined as being "fully synchronous", but also "not guaranteed to * be fully ordered with respect to other memory and I/O operations". We're diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 7fc5e4a..d78cc74 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -7,6 +7,7 @@ #define _ASM_RISCV_PGTABLE_H #include +#include #include @@ -88,6 +89,7 @@ extern pgd_t swapper_pg_dir[]; #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) #define VMALLOC_END (PAGE_OFFSET - 1) #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) +#define PCI_IO_SIZE SZ_16M /* * Roughly size the vmemmap space to be large enough to fit enough @@ -102,7 +104,10 @@ extern pgd_t swapper_pg_dir[]; #define vmemmap ((struct page *)VMEMMAP_START) -#define FIXADDR_TOP (VMEMMAP_START) +#define PCI_IO_END VMEMMAP_START +#define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) +#define FIXADDR_TOP PCI_IO_START + #ifdef CONFIG_64BIT #define FIXADDR_SIZE PMD_SIZE #else