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X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.236.59 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [40.107.236.59 listed in wl.mailspike.net] -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aou@eecs.berkeley.edu, anup@brainfault.org, lollivier@baylibre.com, green.wan@sifive.com, atish.patra@wdc.com, Yash Shah , alistair.francis@wdc.com, deepa.kernel@gmail.com, bmeng.cn@gmail.com Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org Define a default set of CPU OPPs for the HiFive Unleashed with the FU540-C000 SoC. This allows CPUFreq to be enabled for this board. The FU540-C000 SoC PVT corners haven't been characterized separately from the HiFive Unleashed board. Thus the OPPs are added to the board DT file, rather than the SoC itself. The specific selection of OPPs are designed to enable fast switching by simply changing the CORE PLL output divider. The exception is the 1GHz OPP. Since the OPP code apparently requires that, upon kernel start, the CPU clock frequency must have been set to an existing OPP frequency, the 1GHz rate is present solely because the default HiFive Unleashed bootloaders set the CPU to run at 1GHz before starting the kernel. Signed-off-by: Yash Shah --- .../riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts index 4a2729f..59db9c0 100644 --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts @@ -46,6 +46,44 @@ compatible = "gpio-restart"; gpios = <&gpio 10 GPIO_ACTIVE_LOW>; }; + + fu540_c000_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-350000000 { + opp-hz = /bits/ 64 <350000000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + }; + opp-999999999 { + opp-hz = /bits/ 64 <999999999>; + }; + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&fu540_c000_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&fu540_c000_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&fu540_c000_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&fu540_c000_opp_table>; +}; + +&cpu4 { + operating-points-v2 = <&fu540_c000_opp_table>; }; &uart0 {