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We also use these defines in arch/riscv/kernel/irq.c and express SIE/SIP flag in-terms of interrupt causes. Signed-off-by: Anup Patel --- arch/riscv/include/asm/encoding.h | 25 +++++++++++++++++++++---- arch/riscv/kernel/irq.c | 9 +++++---- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h index 29699705dc36..4f187854fd8b 100644 --- a/arch/riscv/include/asm/encoding.h +++ b/arch/riscv/include/asm/encoding.h @@ -44,10 +44,22 @@ #define SATP_MODE SATP_MODE_39 #endif -/* Interrupt Enable and Interrupt Pending flags */ -#define SIE_SSIE _AC(0x00000002, UL) /* Software Interrupt Enable */ -#define SIE_STIE _AC(0x00000020, UL) /* Timer Interrupt Enable */ -#define SIE_SEIE _AC(0x00000200, UL) /* External Interrupt Enable */ +/* SCAUSE */ +#ifdef CONFIG_64BIT +#define SCAUSE_IRQ_FLAG _AC(0x8000000000000000, UL) +#else +#define SCAUSE_IRQ_FLAG _AC(0x80000000, UL) +#endif + +#define IRQ_U_SOFT 0 +#define IRQ_S_SOFT 1 +#define IRQ_M_SOFT 3 +#define IRQ_U_TIMER 4 +#define IRQ_S_TIMER 5 +#define IRQ_M_TIMER 7 +#define IRQ_U_EXT 8 +#define IRQ_S_EXT 9 +#define IRQ_M_EXT 11 #define EXC_INST_MISALIGNED 0 #define EXC_INST_ACCESS 1 @@ -59,4 +71,9 @@ #define EXC_LOAD_PAGE_FAULT 13 #define EXC_STORE_PAGE_FAULT 15 +/* SIE (Interrupt Enable) and SIP (Interrupt Pending) flags */ +#define SIE_SSIE (_AC(0x1, UL) << IRQ_S_SOFT) +#define SIE_STIE (_AC(0x1, UL) << IRQ_S_TIMER) +#define SIE_SEIE (_AC(0x1, UL) << IRQ_S_EXT) + #endif /* _ASM_RISCV_ENCODING_H */ diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c index 48e6b7db83a1..22b8183ae8d4 100644 --- a/arch/riscv/kernel/irq.c +++ b/arch/riscv/kernel/irq.c @@ -9,14 +9,15 @@ #include #include #include +#include #include /* * Possible interrupt causes: */ -#define INTERRUPT_CAUSE_SOFTWARE 1 -#define INTERRUPT_CAUSE_TIMER 5 -#define INTERRUPT_CAUSE_EXTERNAL 9 +#define INTERRUPT_CAUSE_SOFTWARE IRQ_S_SOFT +#define INTERRUPT_CAUSE_TIMER IRQ_S_TIMER +#define INTERRUPT_CAUSE_EXTERNAL IRQ_S_EXT /* * The high order bit of the trap cause register is always set for @@ -24,7 +25,7 @@ * quickly. The INTERRUPT_CAUSE_* macros don't contain that bit, so we * need to mask it off. */ -#define INTERRUPT_CAUSE_FLAG (1UL << (__riscv_xlen - 1)) +#define INTERRUPT_CAUSE_FLAG SCAUSE_IRQ_FLAG int arch_show_interrupts(struct seq_file *p, int prec) {