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30 Apr 2019 05:27:57 +0800 IronPort-SDR: LSCUFtEb5ee3JvDH+ME6qJwOezlHlOx1UnacA2QZMoD5zpeCFCcPVxtoE4IJCQ5OjUbDCMAGHK OxoEU/v84s3EbE0m9sfWpN2qBWry51WORXiHm+5CXFDHXfTRaovdyQ0j1IYNK+qXRT3FDo2gIv P+0Khwk/OxhTRyZFZEdudG5fXv3QIszZKS4LUvseUVQK7lkSvJzGuB7hLLVTroyOyS832awXVT 11zWTl5S0gwnkX4QwBLSLMtxK4XF8DpHNS4adBok7t3uUCO5toci6tcUDDBRg29UU489uP7yYX pm37/fax/0M2712UY75bOqxZ Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP; 29 Apr 2019 14:06:27 -0700 IronPort-SDR: AeMSfyunL2LsJhLHPw2d6fgcuYcVNj32UjjthqEnf0K3EjrF0GfZMDuDh2OiloNPAlz1aVw0i+ rx3dfrB4ctlfgfcrvEiWMY+xU/qL+lKYERo0bkL1QP8bZFPZXWNmK7AHG7clayjGa0Lj8ENMyx 1wOmvOtnbDL3ngbhjQJ8wQKU3EyfHbxJyNq4JwOyOf6ZFZT8aE5nKv3MOFwnA7Y9OWIXRSIzTU D9skxvS/yaP+Q4I3XwxKDgiOXhch58PXoMJmzb/ezPJ2i0WDiO2HBIWmE1psz19MgvK5WqcNgm V3M= Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip02.wdc.com with ESMTP; 29 Apr 2019 14:27:57 -0700 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] RISC-V: Update tlb flush counters Date: Mon, 29 Apr 2019 14:27:50 -0700 Message-Id: <20190429212750.26165-4-atish.patra@wdc.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190429212750.26165-1-atish.patra@wdc.com> References: <20190429212750.26165-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190429_142800_465043_B7E620E4 X-CRM114-Status: GOOD ( 12.56 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christoph Hellwig , Albert Ou , Thomas Gleixner , Kees Cook , Changbin Du , Anup Patel , Palmer Dabbelt , "maintainer:X86 ARCHITECTURE 32-BIT AND 64-BIT" , linux-mm@kvack.org, Atish Patra , Ingo Molnar , Borislav Petkov , Vlastimil Babka , Gary Guo , "H. Peter Anvin" , Andrew Morton , linux-riscv@lists.infradead.org, Luc Van Oostenryck Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The TLB flush counters under vmstat seems to be very helpful while debugging TLB flush performance in RISC-V. Update the counters in every TLB flush methods respectively. Signed-off-by: Atish Patra --- arch/riscv/include/asm/tlbflush.h | 5 +++++ arch/riscv/mm/tlbflush.c | 12 ++++++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h index 29a780ca232a..19779a083f52 100644 --- a/arch/riscv/include/asm/tlbflush.h +++ b/arch/riscv/include/asm/tlbflush.h @@ -9,6 +9,7 @@ #define _ASM_RISCV_TLBFLUSH_H #include +#include /* * Flush entire local TLB. 'sfence.vma' implicitly fences with the instruction @@ -16,11 +17,13 @@ */ static inline void local_flush_tlb_all(void) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); __asm__ __volatile__ ("sfence.vma" : : : "memory"); } static inline void local_flush_tlb_mm(struct mm_struct *mm) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); /* Flush ASID 0 so that global mappings are not affected */ __asm__ __volatile__ ("sfence.vma x0, %0" : : "r" (0) : "memory"); } @@ -28,6 +31,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm) static inline void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE); __asm__ __volatile__ ("sfence.vma %0, %1" : : "r" (addr), "r" (0) : "memory"); @@ -35,6 +39,7 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, static inline void local_flush_tlb_kernel_page(unsigned long addr) { + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE); __asm__ __volatile__ ("sfence.vma %0" : : "r" (addr) : "memory"); } diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c index ceee76f14a0a..8072d7da32bb 100644 --- a/arch/riscv/mm/tlbflush.c +++ b/arch/riscv/mm/tlbflush.c @@ -4,6 +4,8 @@ */ #include +#include +#include #include #define SFENCE_VMA_FLUSH_ALL ((unsigned long) -1) @@ -110,6 +112,7 @@ static void ipi_remote_sfence_vma(void *info) unsigned long size = data->size; unsigned long i; + count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED); if (size == SFENCE_VMA_FLUSH_ALL) { local_flush_tlb_all(); } @@ -129,6 +132,8 @@ static void ipi_remote_sfence_vma_asid(void *info) unsigned long size = data->size; unsigned long i; + count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED); + /* Flush entire MM context */ if (size == SFENCE_VMA_FLUSH_ALL) { __asm__ __volatile__ ("sfence.vma x0, %0" : : "r" (asid) @@ -158,6 +163,13 @@ static void remote_sfence_vma(unsigned long start, unsigned long size) static void remote_sfence_vma_asid(cpumask_t *mask, unsigned long start, unsigned long size, unsigned long asid) { + int cpuid = smp_processor_id(); + + if (cpumask_equal(mask, cpumask_of(cpuid))) + count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL); + else + count_vm_tlb_event(NR_TLB_REMOTE_FLUSH); + if (tlbi_ipi) { struct tlbi info = { .start = start,