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[203.116.164.13]) by smtp.gmail.com with ESMTPSA id h66sm3665649pjb.0.2019.09.13.12.28.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 12:28:06 -0700 (PDT) Subject: [PATCH 4/4] Documentation: riscv: boot: Don't mention big-endian Date: Fri, 13 Sep 2019 12:24:33 -0700 Message-Id: <20190913192433.4316-5-palmer@sifive.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913192433.4316-1-palmer@sifive.com> References: <20190913192433.4316-1-palmer@sifive.com> MIME-Version: 1.0 From: Palmer Dabbelt To: linux-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190913_122807_211212_9CC8CE85 X-CRM114-Status: UNSURE ( 9.42 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.214.196 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.214.196 listed in wl.mailspike.net] 0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Palmer Dabbelt Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org The documentation defines a flag to indicate big endian systems, but doesn't define what that flag actually means -- for example: * Are the other fields BE or LE? * Does the BE format assume the bootloader enters BE mode, is there a kernel stub that does so, or are we adding extra BE instructions? Signed-off-by: Palmer Dabbelt --- Documentation/riscv/boot-image-header.txt | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/riscv/boot-image-header.txt b/Documentation/riscv/boot-image-header.txt index e325d1c9ad4c..d3efaf374b27 100644 --- a/Documentation/riscv/boot-image-header.txt +++ b/Documentation/riscv/boot-image-header.txt @@ -42,8 +42,5 @@ Notes: header extendible in future. One example would be to accommodate ISA extension for RISC-V in future. For current version, it is set to be zero. -- In current header, the flag field has only one field. - Bit 0: Kernel endianness. 1 if BE, 0 if LE. - - Image size is mandatory for boot loader to load kernel image. Booting will fail otherwise.