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11 Feb 2020 17:44:47 -0800 IronPort-SDR: XZ75HwAnE+P9lENVdrLEHufZnVd6QXvw4PlHcN8S93gGExvO48x/WJUDn7MTDuO4bI3wHgW50H MHBVvZ/q9OyOCP1bQeXi05EnwfKB2KyHKZKc8L3G4TR/jKpXN79tL6Th63k3XWkQeBpFt9AOF3 SEIe85g8xUgf3X3SwO0AgKgB+dvhbSnLE6NyLtvSL9DVjs1hzxGRjW5TV9KKZ8sAmq97ysAaPm /GVm534nwwLYp7sxcnV8n7047rUNFyaBfryyFT4r6L036dFrzNANTj2QC4QSg1gVrFbdZg1suP SNU= WDCIronportException: Internal Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip02.wdc.com with ESMTP; 11 Feb 2020 17:51:57 -0800 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v8 10/11] irqchip/sifive-plic: Initialize the plic handler when cpu comes online Date: Tue, 11 Feb 2020 17:48:21 -0800 Message-Id: <20200212014822.28684-11-atish.patra@wdc.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200212014822.28684-1-atish.patra@wdc.com> References: <20200212014822.28684-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200211_175159_634350_5EF4ECB1 X-CRM114-Status: GOOD ( 14.50 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [68.232.143.124 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Jason Cooper , Vincent Chen , Michael Ellerman , Anup Patel , Daniel Lezcano , Heiko Carstens , Mike Rapoport , Atish Patra , Mao Han , Geert Uytterhoeven , "Eric W. Biederman" , Paul Walmsley , Marc Zyngier , Marek Szyprowski , Palmer Dabbelt , linux-riscv@lists.infradead.org, Borislav Petkov , Thomas Gleixner , Allison Randal , Kees Cook Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org Currently, plic threshold and priority are only initialized once in the beginning. However, threshold can be set to disabled if cpu is marked offline with cpu hotplug feature. This will not allow to change the irq affinity to a cpu that just came online. Add plic specific cpu hotplug callback and initialize the per cpu handler when cpu comes online. Signed-off-by: Atish Patra --- drivers/irqchip/irq-sifive-plic.c | 34 ++++++++++++++++++++++++------- include/linux/cpuhotplug.h | 1 + 2 files changed, 28 insertions(+), 7 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 0aca5807a119..9b564b19f4bf 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -4,6 +4,7 @@ * Copyright (C) 2018 Christoph Hellwig */ #define pr_fmt(fmt) "plic: " fmt +#include #include #include #include @@ -55,6 +56,8 @@ #define CONTEXT_THRESHOLD 0x00 #define CONTEXT_CLAIM 0x04 +#define PLIC_DISABLE_THRESHOLD 0xffffffff + static void __iomem *plic_regs; struct plic_handler { @@ -208,6 +211,26 @@ static int plic_find_hart_id(struct device_node *node) return -1; } +static void plic_handler_init(struct plic_handler *handler, u32 threshold) +{ + irq_hw_number_t hwirq; + + /* priority must be > threshold to trigger an interrupt */ + writel(threshold, handler->hart_base + CONTEXT_THRESHOLD); + for (hwirq = 1; hwirq < plic_irqdomain->hwirq_max; hwirq++) + plic_toggle(handler, hwirq, 0); +} + +static int plic_starting_cpu(unsigned int cpu) +{ + u32 threshold = 0; + struct plic_handler *handler = per_cpu_ptr(&plic_handlers, cpu); + + plic_handler_init(handler, threshold); + + return 0; +} + static int __init plic_init(struct device_node *node, struct device_node *parent) { @@ -243,9 +266,7 @@ static int __init plic_init(struct device_node *node, for (i = 0; i < nr_contexts; i++) { struct of_phandle_args parent; struct plic_handler *handler; - irq_hw_number_t hwirq; int cpu, hartid; - u32 threshold = 0; if (of_irq_parse_one(node, i, &parent)) { pr_err("failed to parse parent for context %d.\n", i); @@ -279,7 +300,7 @@ static int __init plic_init(struct device_node *node, handler = per_cpu_ptr(&plic_handlers, cpu); if (handler->present) { pr_warn("handler already present for context %d.\n", i); - threshold = 0xffffffff; + plic_handler_init(handler, PLIC_DISABLE_THRESHOLD); goto done; } @@ -291,13 +312,12 @@ static int __init plic_init(struct device_node *node, plic_regs + ENABLE_BASE + i * ENABLE_PER_HART; done: - /* priority must be > threshold to trigger an interrupt */ - writel(threshold, handler->hart_base + CONTEXT_THRESHOLD); - for (hwirq = 1; hwirq <= nr_irqs; hwirq++) - plic_toggle(handler, hwirq, 0); nr_handlers++; } + cpuhp_setup_state(CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING, + "irqchip/sifive/plic:starting", + plic_starting_cpu, NULL); pr_info("mapped %d interrupts with %d handlers for %d contexts.\n", nr_irqs, nr_handlers, nr_contexts); set_handle_irq(plic_handle_irq); diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h index e51ee772b9f5..5360e03db08c 100644 --- a/include/linux/cpuhotplug.h +++ b/include/linux/cpuhotplug.h @@ -100,6 +100,7 @@ enum cpuhp_state { CPUHP_AP_IRQ_ARMADA_XP_STARTING, CPUHP_AP_IRQ_BCM2836_STARTING, CPUHP_AP_IRQ_MIPS_GIC_STARTING, + CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING, CPUHP_AP_ARM_MVEBU_COHERENCY, CPUHP_AP_MICROCODE_LOADER, CPUHP_AP_PERF_X86_AMD_UNCORE_STARTING,