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20 Feb 2020 16:37:21 -0800 IronPort-SDR: L4KuFcqyf9oql80GhFUx0COR/158IP2mIwpdmEivayTGqF/PTYrigQ6XKxUXr0zvfQ2c89gd/x fEVrQz94jqEPcZrRmV4HApCXSfViMnVtYNUKr3PzEe44jZCDDRG6y68bJtul6o/TXYX5TJzg2h TP8k/Wc7i9o/ajEX0rrOLvZquCS94SJ7wLLsFFAqOgZ+N6d0khlR4+KbZzLsVIqOMjj/Xu4DL9 dJoOoH30yahRaBqnGmIR+PHG3aLOgk3JZ0NnsV0De/m+b5/qd/3yvgl3tQc/eOF44k07IXCvxn tss= WDCIronportException: Internal Received: from yoda.sdcorp.global.sandisk.com (HELO yoda.int.fusionio.com) ([10.196.158.80]) by uls-op-cesaip01.wdc.com with ESMTP; 20 Feb 2020 16:44:46 -0800 From: Atish Patra To: linux-kernel@vger.kernel.org Subject: [PATCH v9 03/12] RISC-V: Add SBI v0.2 extension definitions Date: Thu, 20 Feb 2020 16:44:04 -0800 Message-Id: <20200221004413.12869-4-atish.patra@wdc.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200221004413.12869-1-atish.patra@wdc.com> References: <20200221004413.12869-1-atish.patra@wdc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200220_164454_029327_E6D51BA2 X-CRM114-Status: UNSURE ( 8.78 ) X-CRM114-Notice: Please train this message. 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Wysocki" , Palmer Dabbelt , Heiko Carstens , Atish Patra , linux-riscv@lists.infradead.org, Kees Cook , Marc Zyngier , Daniel Lezcano , Mike Rapoport , Geert Uytterhoeven , Borislav Petkov , Mao Han , Albert Ou , Jason Cooper , Paul Walmsley , Thomas Gleixner , Nick Hu , Greg Kroah-Hartman , Vincent Chen , Palmer Dabbelt , "Eric W. Biederman" , Anup Patel Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org Few v0.1 SBI calls are being replaced by new SBI calls that follows v0.2 calling convention. This patch just defines these new extensions. Signed-off-by: Atish Patra Reviewed-by: Anup Patel Reviewed-by: Palmer Dabbelt --- arch/riscv/include/asm/sbi.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index fbdb7443784a..e478368a47f3 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -21,6 +21,9 @@ enum sbi_ext_id { SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7, SBI_EXT_0_1_SHUTDOWN = 0x8, SBI_EXT_BASE = 0x10, + SBI_EXT_TIME = 0x54494D45, + SBI_EXT_IPI = 0x735049, + SBI_EXT_RFENCE = 0x52464E43, }; enum sbi_ext_base_fid { @@ -33,6 +36,24 @@ enum sbi_ext_base_fid { SBI_EXT_BASE_GET_MIMPID, }; +enum sbi_ext_time_fid { + SBI_EXT_TIME_SET_TIMER = 0, +}; + +enum sbi_ext_ipi_fid { + SBI_EXT_IPI_SEND_IPI = 0, +}; + +enum sbi_ext_rfence_fid { + SBI_EXT_RFENCE_REMOTE_FENCE_I = 0, + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA, + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID, + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA, + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID, + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA, + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID, +}; + #define SBI_SPEC_VERSION_DEFAULT 0x1 #define SBI_SPEC_VERSION_MAJOR_SHIFT 24 #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f