diff mbox series

riscv: Set text_offset correctly for M-Mode

Message ID 20201017182848.125139-1-seanga2@gmail.com (mailing list archive)
State New, archived
Headers show
Series riscv: Set text_offset correctly for M-Mode | expand

Commit Message

Sean Anderson Oct. 17, 2020, 6:28 p.m. UTC
M-Mode Linux is loaded at the start of RAM, not 2MB later. Perhaps this
should be calculated based on PAGE_OFFSET somehow? Even better would be to
deprecate text_offset and instead introduce something absolute.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

 arch/riscv/kernel/head.S | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Damien Le Moal Oct. 19, 2020, 12:08 a.m. UTC | #1
On 2020/10/18 3:29, Sean Anderson wrote:
> M-Mode Linux is loaded at the start of RAM, not 2MB later. Perhaps this
> should be calculated based on PAGE_OFFSET somehow? Even better would be to
> deprecate text_offset and instead introduce something absolute.
> 
> Signed-off-by: Sean Anderson <seanga2@gmail.com>
> ---
> 
>  arch/riscv/kernel/head.S | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 0a4e81b8dc79..74679f338c65 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -27,12 +27,17 @@ ENTRY(_start)
>  	/* reserved */
>  	.word 0
>  	.balign 8
> +#ifdef CONFIG_RISCV_S_MODE

Shouldn't this be:

#ifndef CONFIG_RISCV_M_MODE

CONFIG_RISCV_S_MODE does not exist.

>  #if __riscv_xlen == 64
>  	/* Image load offset(2MB) from start of RAM */
>  	.dword 0x200000
>  #else
>  	/* Image load offset(4MB) from start of RAM */
>  	.dword 0x400000
> +#endif
> +#else
> +	/* Image load offset (0MB) from start of RAM for M-mode */
> +	.dword 0
>  #endif
>  	/* Effective size of kernel image */
>  	.dword _end - _start
> 

Otherwise, looks good to me.
Sean Anderson Oct. 22, 2020, 8:30 p.m. UTC | #2
On 10/18/20 8:08 PM, Damien Le Moal wrote:
> On 2020/10/18 3:29, Sean Anderson wrote:
>> M-Mode Linux is loaded at the start of RAM, not 2MB later. Perhaps this
>> should be calculated based on PAGE_OFFSET somehow? Even better would be to
>> deprecate text_offset and instead introduce something absolute.
>>
>> Signed-off-by: Sean Anderson <seanga2@gmail.com>
>> ---
>>
>>  arch/riscv/kernel/head.S | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
>> index 0a4e81b8dc79..74679f338c65 100644
>> --- a/arch/riscv/kernel/head.S
>> +++ b/arch/riscv/kernel/head.S
>> @@ -27,12 +27,17 @@ ENTRY(_start)
>>  	/* reserved */
>>  	.word 0
>>  	.balign 8
>> +#ifdef CONFIG_RISCV_S_MODE
> 
> Shouldn't this be:
> 
> #ifndef CONFIG_RISCV_M_MODE
> 
> CONFIG_RISCV_S_MODE does not exist.
> 
>>  #if __riscv_xlen == 64
>>  	/* Image load offset(2MB) from start of RAM */
>>  	.dword 0x200000
>>  #else
>>  	/* Image load offset(4MB) from start of RAM */
>>  	.dword 0x400000
>> +#endif
>> +#else
>> +	/* Image load offset (0MB) from start of RAM for M-mode */
>> +	.dword 0
>>  #endif
>>  	/* Effective size of kernel image */
>>  	.dword _end - _start
>>
> 
> Otherwise, looks good to me.
> 

Thanks for spotting that. Should be fixed in v2.

--Sean
diff mbox series

Patch

diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 0a4e81b8dc79..74679f338c65 100644
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -27,12 +27,17 @@  ENTRY(_start)
 	/* reserved */
 	.word 0
 	.balign 8
+#ifdef CONFIG_RISCV_S_MODE
 #if __riscv_xlen == 64
 	/* Image load offset(2MB) from start of RAM */
 	.dword 0x200000
 #else
 	/* Image load offset(4MB) from start of RAM */
 	.dword 0x400000
+#endif
+#else
+	/* Image load offset (0MB) from start of RAM for M-mode */
+	.dword 0
 #endif
 	/* Effective size of kernel image */
 	.dword _end - _start